2017
DOI: 10.1007/s10825-017-0996-5
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Modeling and performance analysis of Schottky barrier carbon nanotube field effect transistor SB-CNTFET

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Cited by 3 publications
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“…Figure 2 shows the geometry of GAA CNTFET modeled by Silvaco's ATLAS 3D tool, which uses a single CNT as a channel with gate wrapped around the channel to provide complete control over the flow of charge carriers through the channel as ballistic transport. The High_K gate dielectric materials have been used in CMOS process and FinFETs [24][25][26], the same concept of equivalent oxide thickness is used here to overcome gate tunneling which causes leakage through the dielectric layer and palladium as gate and source/drain contact materials due to its better wettability and compatibility with other material layers in the CNTFET device structure [13,27]. The palladium as conductor for source/drain/gate contacts, heavily doped source/drain n +regions with donor concentration of 1e+20 /cm 3 for ohmic contacts and SiO 2 -HfO 2 stack as gate dielectric material to provide better gate coupling without increase in gate tunneling current for optimum device performance and leakage reduction has been used to model and simulate GAA CNTFET for robust applications.…”
Section: Simulation and Estimation Of Band Gap And Density Of States mentioning
confidence: 99%
“…Figure 2 shows the geometry of GAA CNTFET modeled by Silvaco's ATLAS 3D tool, which uses a single CNT as a channel with gate wrapped around the channel to provide complete control over the flow of charge carriers through the channel as ballistic transport. The High_K gate dielectric materials have been used in CMOS process and FinFETs [24][25][26], the same concept of equivalent oxide thickness is used here to overcome gate tunneling which causes leakage through the dielectric layer and palladium as gate and source/drain contact materials due to its better wettability and compatibility with other material layers in the CNTFET device structure [13,27]. The palladium as conductor for source/drain/gate contacts, heavily doped source/drain n +regions with donor concentration of 1e+20 /cm 3 for ohmic contacts and SiO 2 -HfO 2 stack as gate dielectric material to provide better gate coupling without increase in gate tunneling current for optimum device performance and leakage reduction has been used to model and simulate GAA CNTFET for robust applications.…”
Section: Simulation and Estimation Of Band Gap And Density Of States mentioning
confidence: 99%