2019
DOI: 10.1108/compel-08-2018-0327
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Modeling of electrical behavior of undoped symmetric Double-Gate (DG) MOSFET using carrier-based approach

Abstract: Purpose This study aims to develop a compact analytical models for undoped symmetric double-gate MOSFET based on carrier approach. Double-Gate (DG) MOSFET is a newly emerging device that can potentially further scale down CMOS technology owing to its excellent control of short channel effects, ideal subthreshold slope and free dopant-associated fluctuation effects. DG MOSFET is of two types: the symmetric DG MOSFET with two gates of identical work functions and asymmetric DG MOSFET with two gates of different … Show more

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Cited by 2 publications
(2 citation statements)
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“…To validate this hypothesis, the semiconductor physical model of the interelectrode capacitance is transformed into an equivalent fractional-order model first according to the mathematical operation relation of Riemann-Liouville fractional calculus and the exponential form semiconductor physical model. Then, Silvaco TCAD simulator is exploited to design NMOS devices with different drain doping concentrations (Singh, 2019;Kelsall et al, 1994;Theron and Plessis, 1994;Goel et al, 2016;Rawat et al, 2014aRawat et al, , 2014b, and ATLAS AC small signal simulation tool is adopted to obtain the C-V characteristic data of the devices. According to the data obtained in simulation, a differential evolution (DE)-based offline scheme is adopted then to identify the parameters of the proposed fractional-order equivalent model.…”
Section: Introductionmentioning
confidence: 99%
“…To validate this hypothesis, the semiconductor physical model of the interelectrode capacitance is transformed into an equivalent fractional-order model first according to the mathematical operation relation of Riemann-Liouville fractional calculus and the exponential form semiconductor physical model. Then, Silvaco TCAD simulator is exploited to design NMOS devices with different drain doping concentrations (Singh, 2019;Kelsall et al, 1994;Theron and Plessis, 1994;Goel et al, 2016;Rawat et al, 2014aRawat et al, , 2014b, and ATLAS AC small signal simulation tool is adopted to obtain the C-V characteristic data of the devices. According to the data obtained in simulation, a differential evolution (DE)-based offline scheme is adopted then to identify the parameters of the proposed fractional-order equivalent model.…”
Section: Introductionmentioning
confidence: 99%
“…Operational amplifier is the most power-hungry block in conventional analog-to-digital converters (ADCs) (Malekzadeh et al , 2018; Scanlan et al , 2017). Nowadays, the intrinsic gain of operational amplifier is reduced by scaling down of complementary metal oxide semiconductor (CMOS) technology (Pan, 1993; Singh, 2019; Batwani et al , 2009). For low-power design of pipelined ADCs, a traditional high-gain amplifier is replaced by the low-gain amplifier at a cost of conversion errors in ADC outputs (Maloberti, 2007; Noori et al , 2016).…”
Section: Introductionmentioning
confidence: 99%