This paper reports a study of the effect of fluorine implantation on the nickel-induced lateral crystallization of amorphous silicon. To distinguish the effects of the fluorine and the implantation damage, the fluorine implant is either made directly into the ␣-Si or into the buffer oxide below the ␣-Si. For a 20 h anneal at 500°C, both types of fluorine implant give a 65% increase in the lateral crystallization width, a five times reduction in the density of nickel silicide precipitates, and an improved grain texture. In contrast, for 20 h anneals at 550 and 600°C, both types of fluorine implant give 29% and 85% reductions in the lateral crystallization width, respectively. The identical results obtained for fluorine implantation into the ␣-Si and the buffer oxide indicates that the effects observed are due to chemical effects of the fluorine rather than implantation damage in the ␣-Si. The increased crystallization width at 500°C is explained by the suppression of random crystallization at the bottom ␣-Si/SiO 2 interface. The reduced crystallization widths at 550 and 600°C are attributed to the diffusion and activation of fluorine and the formation of Si-F bonds making the ␣-Si more resistant to silicide-mediated phase transformation.The crystallization of amorphous silicon ͑␣-Si͒ has been intensively investigated for application in active-matrix flat-panel displays and three-dimensional ͑3D͒ electronics. 1-17 Solid phase crystallization was originally used to produce polysilicon from amorphous silicon, and can be typically achieved using a 20 h anneal at a temperature around 600°C. 1,2 The disadvantages of solid phase crystallization ͑SPC͒ are a small grain size, typically 0.5-1 m, and a lack of control over grain boundary locations. 1 As a result, thin-film transistors realized ͑TFT͒ on SPC films exhibit degraded performance. 3 To improve the performance of TFTs fabricated on SPC films, fluorination of the film after or before amorphous silicon crystallization has been used in the past. 4-9 For fluorination applied after amorphous silicon crystallization, the fluorine had demonstrable passivation effects on grain boundaries and gave improved device performance. 4-7 For fluorination applied prior to amorphous silicon crystallization, improved TFT electrical characteristics were shown to come from both grain size enhancement and fluorine passivation. 8,9 It was shown that fluorine ͑F͒ implantation with a dose greater that 2 ϫ 10 15 /cm 2 and a projected range at the bottom ␣-Si/SiO 2 interface, resulted in a significant increase in grain size 9 and a strong ͑111͒ preferred orientation 8 in the SPC film. This improvement in grain size was attributed to the retardation of the random crystallization owing to the higher degree of amorphization at the bottom ␣-Si/SiO 2 interface as a result of the fluorine implant. 8 Similar results were also reported in fluorine implanted silicongermanium ͑SiGe͒ films. 10 More recently, several techniques have been studied for the fabrication of large grain polycrystalline silicon ...