Modeling of MoS2 Tunnel Field Effect Transistor in Verilog-A for VLSI Circuit Design

Abstract

This paper presents a newly designed physics-based analytical current transport model of both n- and p-type MoS2 tunnel field-effect transistor (TFET) using a high-level hardware language Verilog-Analog (Verilog-A) within Cadence/Spectre. The performance of our model is analysed by extracting different parameters, including transfer characteristics, power dissipation, and consumption, delay, power delay product (PDP) from the designed inverter. Moreover, we design a ring oscillator, and a half adder circuit to assess the compatibility of our model in both the analog and digital circuits. Our observation reveals that the voltage-controlled oscillator (VCO) can operate at a frequency of 31.6 GHz with a power consumption of 0.083 mW, and generates a phase noise of -122.5 dBc/Hz at 1MHz offset frequency. The simulated outputs (sum & carry) obtained from the half adder circuit exactly match the truth table of the circuit. Last, we present a comparison, using the performance parameters, of the ring oscillator with existing CMOS and GFET technologies. The results show that our designed VCO oscillates at a higher frequency with low power consumption and improved phase noise performance. With all the output characteristics obtained from the commercial software simulation, we expect our model to be applicable to a real-time low power VLSI circuit.