Modeling of power converters for debugging digital controllers through FPGA emulation

Abstract

Esta es la versión de autor de la comunicación de congreso publicada en: This is an author produced version of a paper published in: AbstractDebugging a digital controller for power converters can be a lengthy process due to the long time required in mixed-signal simulations. This paper focuses on the design of a power converter model for debugging digital controllers in closed loop. The testing may be performed by means of simulation or emulation. This paper shows the results of simulating and emulating the power converter using different data representations. Experiments will show that through a good selection of data and emulation, testing can be speeded up over 28, 000 times.

Field Programmable Gate Array Applications—A Scientometric Review

“…• Control systems [1224][1225][1226][1227][1228] • Power Electronics [1028,1086,[1229][1230][1231][1232] • Network on chip [1233,1234] • Thermomechanical systems [1235,1236] • Employees behavior and interactions in workplace [928] • Computer networks [1237,1238] • Arousal content [1239] • FIFO stack [1217] • HPC power consumption [1118] • Meteorological systems [1240] • UAV (Unmanned Aerial Vehicle), vehicles and mobile robots [1241,1242] • Renewable energy systems [1225,1243,1244] • RF (Radio Frequency) power amplifier [1245] • Urban traffic [937] Data compression is a reduction in the number of bits needed to represent the data [1246]. In FPGAs data compression has been implemented in the LZ77 algorithm [1247][1248][1249][1250], Huffman coding [1251][1252][1253], LZW (Lempel-Ziv-Welch) algorithm [1248,[1254][1255][1256][1257] and hardware accelerator compressing techniques…”