Modeling Resistance Instabilities of Set and Reset States in Phase Change Memory With Ge-Rich GeSbTe

Abstract

To satisfy the growing market demand for embedded non-volatile memory (eNVM), alternative solutions to Flash technology are currently under investigation. Among these, phase change memory (PCM) is attracting strong interest due to the low cost of integration with the CMOS front-end and good scalability. Embedded PCM (ePCM), however, must feature high reliability during both packaging and functional stages. This work studies reliability of PCM based on Ge-rich GeSbTe, providing evidence for resistance drift and decay in both the reset and set states. Set state instability is attributed to grain-boundary relaxation and grain growth. A unified model is presented, capable of predicting the reliability of set/reset states at elevated temperature.

Resistive Switching Device Technology Based on Silicon Oxide for Improved ON–OFF Ratio—Part I: Memory Devices

“…For adoption as SCM or embedded nonvolatile memory, SiO x RRAM must satisfy not only switching window, variability, and noise requirements, but also endurance and temperature-dependent retention criteria. For instance, application as embedded memory requires that the written data survive the thermal budget of the soldering reflow, typically few minutes at 260°C [27], [28]. The reliability of SiO x RRAM devices was studied from the point of view of both data retention at high temperature and endurance.…”

Engineering of chalcogenide materials for embedded applications of Phase Change Memory

“…In particular, it must be highlighted that D-alloy is definitely better performing on the SET side, allowing an extremely large reading window (evaluated at 1e-6, corresponding to ppm level). This is achieved thanks to better intrinsic properties and lower drift of SET state [20] in case of D-alloy. At the end, D-alloy seems a more flexible solution if not extremely challenging retention properties are requested by the application, as with the case of soldering compliance.…”

Monte Carlo model of resistance evolution in embedded PCM with Ge-rich GST

“…Both programmed states, namely the poly-crystalline set state and the amorphous reset state, show similar evolution, including a T-activated drift [2] according to the power law R/R(t0) = (t/t0)  , followed by a R drop due to crystallization and grain growth [3]. A PCM model describing the T-activated R(t) was already been proposed [4]. However, as shown in Fig.…”

“…3 shows the measured set-state R as a function of time at increasing annealing temperature TA = 125°C, 180°C and 220°C. Data show R drift followed by crystallization and a third regime of R increase [4]. Note that a relatively low TA allows to accurately evaluate the drift coefficient  (Fig.…”

“…MC model. Following [4], we describe the time evolution R(t) as a T-activated conduction R=R0exp(EC/kTR), where the activation energy for conduction EC changes with time according to [4]:…”