Modeling the unknown! Towards model-independent fault and error diagnosis

Boppana, Vamsi; Fujita, Masato

doi:10.1109/test.1998.743310

Cited by 40 publications

(21 citation statements)

References 31 publications

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“…In addition, during the test, signals only need to be traced within the new reduced window. Finally, X-simulation [17], simulating the design with logic unknown at the output ports of the suspects, is performed to identify the state elements where the error effects propagate. The above information feeds back to the algorithm to drive the next debug session where the algorithm iterates the three steps in Figure 4.…”

Section: Methodology Overviewmentioning

confidence: 99%

Automated data analysis solutions to silicon debug

Yang¹,

Nicolici²,

Veneris³

2009

2009 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition

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Since pre-silicon functional verification is insufficient to detect all design errors, re-spins are often needed due to malfunctions that escape into the silicon. This paper presents an automated software solution to analyze the data collected during silicon debug. The proposed methodology analyzes the test sequences to detect suspects in both the spatial and the temporal domain. A set of software debug techniques are proposed to analyze the acquired data from the hardware testing and provide suggestions for the setup of the test environment in the next debug session. A comprehensive set of experiments demonstrate its effectiveness in terms of run-time and resolution.

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Section: Methodology Overviewmentioning

confidence: 99%

Automated data analysis solutions to silicon debug

Yang¹,

Nicolici²,

Veneris³

2009

2009 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition

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“…The SAT-based diagnosis algorithm from [14] performs model-free diagnosis [19]. That is, it does not make any assumption on the behavior of the fault/error.…”

Section: Boolean Satisfiability and Unsat Coresmentioning

confidence: 99%

“…A simple approach to identify those registers is using X-simulation [19], which simulates the design with logic unknown at the output of the suspects to capture all possible paths for error propagation. Then, any registers that store logic unknown are the candidates for tracing.…”

Section: Data Acquisition Setupmentioning

confidence: 99%

Automated data analysis techniques for a modern silicon debug environment

Yang

Veneris

Nicolici

et al. 2012

17th Asia and South Pacific Design Automation Conference

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Abstract-With the growing size of modern designs and more strict time-to-market constraints, design errors unavoidably escape pre-silicon verification and reside in silicon prototypes. As a result, silicon debug has become a necessary step in the digital integrated circuit design flow. Although embedded hardware blocks, such as scan chains and trace buffers, provide a means to acquire data of internal signals in real time for debugging, there is a relative shortage in methodologies to efficiently analyze this vast data to identify root-causes. This paper presents an automated software solution that attempts to fill-in the gap. The presented techniques automate the configuration process for trace-buffer based hardware in order to acquire helpful information for debugging the failure, and detect suspects of the failure in both the spatial and temporal domain.

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“…To overcome these obstacles, the concept of simulation-based debugging has been enriched with simulation of unknown values [4] to alleviate the need for an error model. Although practical in some cases, unknowns can decrease the resolution of the solution for large designs or for sequential designs.…”

Section: Simulation-based Debuggingmentioning

confidence: 99%

The day Sherlock Holmes decided to do EDA

Veneris

Safarpour

2009

Proceedings of the 46th Annual Design Automation Conference

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Semiconductor design companies are in a continuous search for design tools that address the ever increasing chip design complexity coupled with strict time-to-market schedules and budgetary constraints. A fundamental aspect of the design process that remains primitive is that of debugging. It takes months to close, it introduces costs and it may jeopardize the release date of the chip. This paper reviews the debugging problem and the research behind it over the past 20 years. The case for automated RTL debug tools and methodologies is also made to help ease the manual burden and complement current industrial verification practices.

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Modeling the unknown! Towards model-independent fault and error diagnosis

Cited by 40 publications

References 31 publications

Automated data analysis solutions to silicon debug

Automated data analysis solutions to silicon debug

Automated data analysis techniques for a modern silicon debug environment

The day Sherlock Holmes decided to do EDA

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