Modelling doping design in nanowire tunnel-FETs based on group-IV semiconductors

Settino, Francesco; Crupi, Felice; Biswas, Subhajit; Holmes, Justin D.; Duffy, Ray

doi:10.1016/j.mssp.2016.10.048

Cited by 7 publications

(4 citation statements)

References 24 publications

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“…Additionally, the bandgap of Ge 1– x Sn x nanowires with a high Sn narrows, resulting in high off-state leakage in a FET device which is difficult to control. 51 …”

Section: Resultsmentioning

confidence: 99%

“…We did not generate any FET devices for Ge 1– x Sn x nanowires with very high Sn contents (>15 atom %), due to their structural instability (Figures S7 and S8 in the Supporting Information), which may also instigate possible deformation of the nanowire lattice under electrical bias. Additionally, the bandgap of Ge 1– x Sn x nanowires with a high Sn narrows, resulting in high off-state leakage in a FET device which is difficult to control …”

Section: Resultsmentioning

confidence: 99%

“…Additionally, the bandgap of Ge 1−x Sn x nanowires with a high Sn narrows, resulting in high off-state leakage in a FET device which is difficult to control. 51 Unintentionally doped nanowires show linear I ds −V ds characteristics between +1 V to −1 V, with V bg = 0 (see Supporting Information, Figure S9). Contacts between the electrode and the nanowire were not ideal, as seen in the electrical features.…”

Section: ■ Results and Discussionmentioning

confidence: 99%

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Stretching the Equilibrium Limit of Sn in Ge_1–xSn_x Nanowires: Implications for Field Effect Transistors

Biswas

Doherty

Galluccio

et al. 2021

ACS Appl. Nano Mater.

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Ge 1– x Sn x nanowires incorporating a large amount of Sn would be useful for mobility enhancement in nanoelectronic devices, a definitive transition to a direct bandgap for application in optoelectronic devices and to increase the efficiency of the GeSn-based photonic devices. Here we report the catalytic bottom-up fabrication of Ge 1– x Sn x nanowires with very high Sn incorporation ( x > 0.3). These nanowires are grown in supercritical toluene under high pressure (21 MPa). The introduction of high pressure in the vapor–liquid–solid (VLS) like growth regime resulted in a substantial increase of Sn incorporation in the nanowires, with a Sn content ranging between 10 and 35 atom %. The incorporation of Sn in the nanowires was found to be inversely related to nanowire diameter; a high Sn content of 35 atom % was achieved in very thin Ge 1– x Sn x nanowires with diameters close to 20 nm. Sn was found to be homogeneously distributed throughout the body of the nanowires, without apparent clustering or segregation. The large inclusion of Sn in the nanowires could be attributed to the nanowire growth kinetics and small nanowire diameters, resulting in increased solubility of Sn in Ge at the metastable liquid–solid interface under high pressure. Electrical investigation of the Ge 1– x Sn x ( x = 0.10) nanowires synthesized by the supercritical fluid approach revealed their potential in nanoelectronics and sensor-based applications.

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“…Additionally, the bandgap of Ge 1– x Sn x nanowires with a high Sn narrows, resulting in high off-state leakage in a FET device which is difficult to control. 51 …”

Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

Section: ■ Results and Discussionmentioning

confidence: 99%

See 1 more Smart Citation

Stretching the Equilibrium Limit of Sn in Ge_1–xSn_x Nanowires: Implications for Field Effect Transistors

Biswas

Doherty

Galluccio

et al. 2021

ACS Appl. Nano Mater.

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“…One intuitive method to suppress ambipolar behavior is to use a lightly doped drain. However, previous investigations didn't reveal expected results, especially for the ultrathin SOI and nanowire structure devices [19]- [21]. Another reported method is to use different materials for the source and drain.…”

Section: Introductionmentioning

confidence: 98%

A T-Shaped SOI Tunneling Field-Effect Transistor With Novel Operation Modes

Liu

Ren

Chen

et al. 2019

IEEE J. Electron Devices Soc.

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We present a novel T-shaped tunneling field-effect transistor (TFET) on Si-on-insulator (SOI). The asymmetric source-drain structure can effectively suppress the ambipolar switching. The on-current (I on )/off-current (I off ) ratio reaches very high value of ∼10 8 at V ds = −0.5 V with a smaller tunneling junction width at the drain. The innovative T-shape design allows integration of both TFET and metaloxide semiconductor field-effect transistors (MOSFET) operation modes in one structure. Both TFET and MOSFET operation modes are experimentally demonstrated in this device structure, which provide the implementation of the selector function with the single device.

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Performance analysis of gate stacked with nitride GAA-TFET

Sharma

Garg

Kaur

2020

Materials Today: Proceedings

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Modelling doping design in nanowire tunnel-FETs based on group-IV semiconductors

Cited by 7 publications

References 24 publications

Stretching the Equilibrium Limit of Sn in Ge_1–xSn_x Nanowires: Implications for Field Effect Transistors

Stretching the Equilibrium Limit of Sn in Ge_1–xSn_x Nanowires: Implications for Field Effect Transistors

A T-Shaped SOI Tunneling Field-Effect Transistor With Novel Operation Modes

Performance analysis of gate stacked with nitride GAA-TFET

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Modelling doping design in nanowire tunnel-FETs based on group-IV semiconductors

Cited by 7 publications

References 24 publications

Stretching the Equilibrium Limit of Sn in Ge1–xSnx Nanowires: Implications for Field Effect Transistors

Stretching the Equilibrium Limit of Sn in Ge1–xSnx Nanowires: Implications for Field Effect Transistors

A T-Shaped SOI Tunneling Field-Effect Transistor With Novel Operation Modes

Performance analysis of gate stacked with nitride GAA-TFET

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Product

Resources

About

Stretching the Equilibrium Limit of Sn in Ge_1–xSn_x Nanowires: Implications for Field Effect Transistors

Stretching the Equilibrium Limit of Sn in Ge_1–xSn_x Nanowires: Implications for Field Effect Transistors