Monitoring and WCET analysis in COTS multi-core-SoC-based mixed-criticality systems

Nowotsch, Jan; Paulitsch, Michael; Henrichsen, Arne; Pongratz, Werner; Schacht, Andreas

doi:10.7873/date2014.080

Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE), 2014 2014

DOI: 10.7873/date2014.080

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Monitoring and WCET analysis in COTS multi-core-SoC-based mixed-criticality systems

Jan Nowotsch¹,

Michael Paulitsch²,

Arne Henrichsen³

et al.

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Measurement-Based Cache Representativeness on Multipath Programs

Milutinović

Abella

Mezzetti

et al. 2018

2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

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Autonomous vehicles in embedded real-time systems increase criticalso ware size and complexity whose performance needs are covered with high-performance hardware features like caches, which however hampers obtaining WCET estimates that hold valid for all program execution paths.is requires assessing that all cache layouts have been properly factored in the WCET process. For measurement-based timing analysis, the most common analysis method, we provide a solution to achieve cache representativeness and full path coverage: we create a modi ed program for analysis purposes where cache impact is upper-bounded across any path, and derive the minimum number of runs required to capture in the test campaign cache layouts resulting in high execution times.

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Measurement-Based Cache Representativeness on Multipath Programs

Milutinović

Abella

Mezzetti

et al. 2018

2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

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Online time interference detection in mixed-criticality applications on multicore architectures using performance counters

Esposito

Violante

Sozzi

et al. 2016

2016 IEEE 22nd International Symposium on on-Line Testing and Robust System Design (IOLTS)

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In this paper a novel technique is proposed for online detection of timing interference in multicore architectures.The technique is aimed at mixed-criticality workloads. This paper describes a method to use hardware performance counters to detect such misbehaviors. Experimental data is gathered, showing the viability of this method. The method can be used as safety-net in several scheduling approaches.

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Challenges in Future Avionic Systems on Multi-Core Platforms

Löfwenmark¹,

Nadjm‐Tehrani

2014

2014 IEEE International Symposium on Software Reliability Engineering Workshops

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Monitoring and WCET analysis in COTS multi-core-SoC-based mixed-criticality systems

Cited by 5 publications

References 0 publications

Measurement-Based Cache Representativeness on Multipath Programs

Measurement-Based Cache Representativeness on Multipath Programs

Online time interference detection in mixed-criticality applications on multicore architectures using performance counters

Challenges in Future Avionic Systems on Multi-Core Platforms

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