Monolithic InP Multi-Wavelength Coherent Receiver

Doerr,; Zhang, Bo; Winzer,

doi:10.1364/ofc.2010.pdpb1

Cited by 10 publications

(8 citation statements)

References 7 publications

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“…Solutions of this kind require considerable optical parallelization and hence ask for massive photonic integration for viable commercialization. Recent examples of monolithic photonic integration include a 10 × 45.6 Gb/s differential PDM-QPSK direct detection receiver [30] and a 4 × 43 Gb/s PDM-QPSK coherent receiver [31] implemented on InP, and a 112-Gb/s coherent receiver implemented on Si [32].…”

Section: Modmentioning

confidence: 99%

Beyond 100G Ethernet

Winzer

2010

IEEE Commun. Mag.

267

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With 100G technologies standardized, in the context of both Ethernet and the optical transport network (OTN), 100G router ports and 100G optical transport interfaces are commercially available. At the same time, heavily data-centric users are starting to ask for higher-rate interfaces. First speculations include 400G as well as 1T as the next possible Ethernet standards. In this article we discuss interface technology options for Ethernet and OTN beyond 100G in light of the current 100G standards, taking into account likely evolution paths of interface technologies over the next 10 years.

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Section: Modmentioning

confidence: 99%

Beyond 100G Ethernet

Winzer

2010

IEEE Commun. Mag.

267

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“…1,2) Conventional InP-based photonic integrated circuits (PICs) can monolithically integrate laser diodes (LDs), modulators, switches, photodetectors, and passive waveguide components on the same chip. [3][4][5][6][7][8][9] However, a small refractive index contrast in an InP-based waveguide causes a weak vertical optical confinement, which prevents the development of ultra small InP-based PICs. To overcome this problem, we have proposed the III-V CMOS photonics platform that uses a III-V-on-insulator (III-V-OI) wafer.…”

Section: Introductionmentioning

confidence: 99%

Low resistivity lateral P–I–N junction formed by Ni–InGaAsP alloy for carrier injection InGaAsP photonic devices

Park

Takenaka

Takagi

2016

Jpn. J. Appl. Phys.

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In this study, we investigate low-resistivity InGaAsP lateral P–I–N junctions using Ni–InGaAsP alloy in conjunction with Zn diffusion. It is found that Ni–InGaAsP alloy is formed via a direct reaction between Ni and InGaAsP after annealing at more than 300 °C. The Ni–InGaAsP preserves the initial Schottky junction properties between Ni and InGaAsP, and thus exhibits an ohmic contact for n-InGaAsP and a Schottky contact for p-InGaAsP. Hence, the Ni–InGaAsP alloy can be used instead of the Si ion implantation process to form the P–I–N junction. The Ni–InGaAsP alloy exhibits significantly lower contact resistance and sheet resistance than Si implanted n+-InGaAsP. The InGaAsP lateral P–I–N junction formed with the Ni–InGaAsP alloy and Zn diffusion shows approximately 10 times lower access resistance than the n+-InGaAsP junction. Thus, we successfully achieve large on-current in the lateral P–I–N junction with the Ni–InGaAsP alloy. The fabrication procedure of the lateral P–I–N junction using the Ni–InGaAsP alloy is promising for carrier-injection photonic devices on the III–V CMOS photonics platform.

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“…A dual-polarization, dual-quadrature (DPDQ) coherent receiver requires many components [1] and is ideally implemented as a photonic integrated circuit (PIC). Integrated DPDQ coherent receiver PICs have been demonstrated using discrete-optic+InP [2], PLC+InP (fiber interconnected) [3], monolithic InP [4], and monolithic Si technologies [5]. Si is beneficial because it can be made into 200-mm diameter or larger wafers allowing for low-cost chips, it does not require a hermetic environment allowing for low-cost packaging, and silicon can be oxidized allowing for high vertical index contrast and consequently high-performance polarization splitters and on-wafer testing.…”

Section: Introductionmentioning

confidence: 99%