Monolithic Integration of E/D-Mode AlGaN/GaN MIS-HEMTs

Kong, Yuechan; Zhou, Jianjun; Kong, Cen; Zhang, Youtao; Dong, Xiaoli; Lu, Haijun; Chen, Tangsheng; Yang, Ning

doi:10.1109/led.2013.2297433

Cited by 37 publications

(15 citation statements)

References 13 publications

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“…Silicon (Si)-based power integrated-circuit (IC) technologies have been widely utilised in high-frequency, low-power applications up to several hundreds of watts [2,3]. On the contrary, gallium nitride (GaN)-based heterojunction field-effect transistors (HFETs) utilising polarisation-induced two-dimensional electron gas (2DEG) are emerging components for next-generation power ICs [4][5][6][7][8][9][10][11][12][13]. Fig.…”

Section: Introductionmentioning

confidence: 99%

GaN‐based complementary metal–oxide–semiconductor inverter with normally off Pch and Nch MOSFETs fabricated using polarisation‐induced holes and electron channels

Nakajima

Kubota

Tsutsui

et al. 2018

IET Power Electronics

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Gallium nitride (GaN)-based P-channel (Pch) and N-channel (Nch) metal-oxide-semiconductor field-effect transistors (MOSFETs) with normally off operations were realised. Both Pch and Nch MOSFETs were monolithically fabricated in a polarisation-junction platform wafer. The platform wafer was constructed with a GaN/aluminium GaN/GaN double heterostructure, which has both two-dimensional hole gas (2DHG) and 2D electron gas (2DEG). The drain currents of Pch and Nch MOSFETs flow through 2DHG and 2DEG, respectively. The threshold gate voltages of the fabricated Pch and Nch MOSFETs were −2.7 and 6.7 V, respectively. It was shown that the threshold voltage and the on-state resistance of the Pch MOSFET can be controlled by adjusting the 2DEG potential. Furthermore, using Pch and Nch MOSFETs, complementary MOS inverter operation was demonstrated.

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Section: Introductionmentioning

confidence: 99%

GaN‐based complementary metal–oxide–semiconductor inverter with normally off Pch and Nch MOSFETs fabricated using polarisation‐induced holes and electron channels

Nakajima

Kubota

Tsutsui

et al. 2018

IET Power Electronics

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“…With those problems in mind, metal–insulator–semiconductor (MIS)‐HEMTs technology has been developed and high threshold voltage and low gate leakage are obtained. Monolithically integrated circuits with E/D‐mode MIS‐HEMTs are also demonstrated with improved output voltage swing . However, incorporating a gate dielectric inevitably reduces the transconductance, which, accompanied by the high threshold voltage, leads to a limited output current density.…”

Section: Introductionmentioning

confidence: 99%

Integrated enhancement/depletion‐mode GaN MIS‐HEMTs for high‐speed mixed‐signal applications

Gao

Kong³

et al. 2016

Physica Status Solidi (a)

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Monolithically integrated enhancement/depletion (E/D)‐mode AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors (MIS‐HEMTs) are being developed for high‐speed mixed‐signal applications. Partially recessed gate combined with buffered gate insulator produce remarkably improved trade‐off between the threshold voltage (1.4 V) and current density (848 mA mm−1) in the E‐mode device. Record peak transconductances of 311 and 248 mA mm−1 are obtained for D‐ and E‐mode MIS‐HEMTs, respectively. A direct‐coupled FET logic (DCFL) 51‐stage ring oscillator implemented using the MIS‐HEMT technique is fabricated, which exhibits high‐speed performance with an oscillation frequency of 908 MHz and a high output voltage swing of 1.48 V.

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“…The concept of normally‐off GaN‐based HEMTs is vital for the future generation of high‐speed mixed‐signal circuits . However, it is not trivial to design HEMTs that will combine high positive threshold voltage V T , with high output current I DS and the HEMT high‐speed capability.…”

Section: Introductionmentioning

confidence: 99%

Self‐aligned normally‐off metal–oxide–semiconductor n⁺⁺GaN/InAlN/GaN high electron mobility transistors

Blaho

Gregušová

Hašc̆ı́k

et al. 2015

Physica Status Solidi (a)

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Self-aligned normally-off n þþ GaN/InAlN/AlN/GaN MOS HEMTs with a recessed gate show scalable threshold voltage between 1.3 to 3.7 V, which increases with the gate oxide thickness. Al 2 O 3 or HfO 2 gate insulators were grown by ALD at 100 8C so that one photoresist mask could be used for the gate recessing, ALD and metal lift-off. A low density of the barrier surface donors $1 Â 10 13 cm À2 stems from the low thermal budged during the HEMT processing and explains the threshold voltage behaviour. Maximal I DS reaches $0.4 A/mm despite 2-mm gate length and 8-mm source-to-gate distance invariant to the threshold voltage. It is shown that for the present device Al 2 O 3 provides better gate insulation than HfO 2 , however, the latter may be more appropriate for highly scaled short gate-length HEMTs.Schematic picture of the self-aligned InAlN/GaN MOS HEMT.

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Monolithic Integration of E/D-Mode AlGaN/GaN MIS-HEMTs

Cited by 37 publications

References 13 publications

GaN‐based complementary metal–oxide–semiconductor inverter with normally off Pch and Nch MOSFETs fabricated using polarisation‐induced holes and electron channels

GaN‐based complementary metal–oxide–semiconductor inverter with normally off Pch and Nch MOSFETs fabricated using polarisation‐induced holes and electron channels

Integrated enhancement/depletion‐mode GaN MIS‐HEMTs for high‐speed mixed‐signal applications

Self‐aligned normally‐off metal–oxide–semiconductor n⁺⁺GaN/InAlN/GaN high electron mobility transistors

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Monolithic Integration of E/D-Mode AlGaN/GaN MIS-HEMTs

Cited by 37 publications

References 13 publications

GaN‐based complementary metal–oxide–semiconductor inverter with normally off Pch and Nch MOSFETs fabricated using polarisation‐induced holes and electron channels

GaN‐based complementary metal–oxide–semiconductor inverter with normally off Pch and Nch MOSFETs fabricated using polarisation‐induced holes and electron channels

Integrated enhancement/depletion‐mode GaN MIS‐HEMTs for high‐speed mixed‐signal applications

Self‐aligned normally‐off metal–oxide–semiconductor n++GaN/InAlN/GaN high electron mobility transistors

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Self‐aligned normally‐off metal–oxide–semiconductor n⁺⁺GaN/InAlN/GaN high electron mobility transistors