Mosaic placement of very high density 3D capacitors for efficient decoupling functionality in the RF domain

Tesson, Olivier; Cornec, F. Le; Jacqueline, Sébastien

doi:10.1109/rfic.2009.5135516

Cited by 4 publications

(2 citation statements)

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“…Table 1 presents the capacitor technological nodes currently available at IPDIA. The increase in capacitance density from one generation to the next one is the combination of advances in dielectric materials deposition (increased resolution, double MIS structure), etching techniques (larger aspect ratio, deeper etching), and device geometry (the so-called 'tripod' shape to optimize density), while maintaining excellent leakage performances for all process nodes [5], [6]. In this paper, the 80 nF/mm 2 PICS2 node is considered.…”

Section: D-capacitor Rf Characterizationmentioning

confidence: 99%

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Characterization, modeling and optimization of 3D embedded trench decoupling capacitors in Si-RF interposer

Jacquinot

Denis²

2013

2013 IEEE 63rd Electronic Components and Technology Conference

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Integrated trench high density MIS (Metal Insulator Semiconductor) capacitors in Si-interposer are of great interest as they provide decoupling in a smart way using the third dimension of the silicon substrate. However, the use of various highly integrated passive components on the same Siinterposer is challenging regarding wide frequency band performances and signal integrity. Both aspects are addressed in this paper based on 300 kHz-20 GHz vector network analyzer measurements on 3D 80 nF/mm 2 decoupling capacitors produced by IPDIA on a high resistivity substrate. Firstly, a scalable 1 MHz-10 GHz wideband model of a 3D capacitor in the 100 pF-10 nF range is developed. Secondly, 3D electromagnetic simulations of substrate and capacitive coupling between 3D capacitors using guard ring are presented. All simulations show good agreement with measurements. To the best of our knowledge, this is the first time that a wideband mathematical model as well as an RF crosstalk study have been published on embedded trench decoupling capacitors. IntroductionThe benefits of having a close proximity between potential noise sources and decoupling capacitors are well known. High density integrated decoupling capacitors are very promising components for the requirements of low crosstalk and signals coupling levels in mixed-circuit and high density 3D interposer applications as illustrated in figure 1.

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Section: D-capacitor Rf Characterizationmentioning

confidence: 99%

“…The number of contacts to the capacitor electrodes is maximized to reduce resistive losses. In addition, a mosaic configuration is used, increasing performances [6]. Finally, to further improve the device capabilities, a large amount of mosaic unit cells are parallelized.…”

Section: D-capacitor Rf Characterizationmentioning

confidence: 99%