MOSFET Linearity Performance Degradation Subject to Drain and Gate Voltage Stress

Yu, Chuanzhao; Yuan, J.S.; Yang, Hong

doi:10.1109/tdmr.2004.838407

Cited by 30 publications

(11 citation statements)

References 13 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…12 (b). Most of the noise distortions are linked with , , and as per the experimental outcomes of Yu et al [17] and the same was reported by Wu et al [18] in the later stages.…”

Section: Impacts Of Drain and Gate Voltage And Mechanical Stresssupporting

confidence: 75%

“…So it is always important to consider the scaling factors at the time of designing and optimization of the complete circuit must follow the design rules. Otherwise shrinking of CMOS devices will lead to increase the channel electric filed and therefore the hot carriers will increase and lead to a transistor burnouts or sometimes there will be a significant effect on the performance of the transistor [17]. Most of the transistors undergo with various mechanical stresses when the transistors are ON state.…”

Section: Impacts Of Drain and Gate Voltage And Mechanical Stressmentioning

confidence: 99%

See 1 more Smart Citation

Low-Power Gilbert Mixer Performance and a Study on Noise Parameters for UWB Frequencies

2018

IJRTER

View full text Add to dashboard Cite

Abstract-The role of Gilbert mixer as an active circuit in most of the communication systems is well known due to isolation between ports and its performance at high frequencies for power applications. However, the performances of these mixers are under a threat due to the involvement of various noise elements within the circuit designs and manufacturing defects. In this research, a detailed study on the manufacturing defects and transistor size impacting on the noise elements is discussed in detail for ultra-wideband (UWB) applications. The tested results in the laboratory revealed various influential factors for flicker noise and thermal noise and also helped to reduce the noise figure to 6 dB as compared with previous works in the same area.

show abstract

“…12 (b). Most of the noise distortions are linked with , , and as per the experimental outcomes of Yu et al [17] and the same was reported by Wu et al [18] in the later stages.…”

Section: Impacts Of Drain and Gate Voltage And Mechanical Stresssupporting

confidence: 75%

Section: Impacts Of Drain and Gate Voltage And Mechanical Stressmentioning

confidence: 99%

Low-Power Gilbert Mixer Performance and a Study on Noise Parameters for UWB Frequencies

2018

IJRTER

View full text Add to dashboard Cite

show abstract

“…In sub-100 nm regime MOSFETs are the strong contenders for analogue RF applications in lucrative wireless communications market. Linearity assessment [1][2][3] is an important parameter in all RF systems which need to be tailored in order to ensure that the inter-modulation and high-order harmonics are minimal at the output. Although there are system level techniques to improve linearity, they all require complex circuitry [4].…”

Section: Introductionmentioning

confidence: 99%

Linearity-Distortion Analysis of GME-TRC MOSFET for High Performance and Wireless Applications

Malik¹,

Gupta²,

Chaujar³

et al. 2011

JSTS:Journal of Semiconductor Technology and Science

View full text Add to dashboard Cite

Abstract-In this present paper, a comprehensive drain current model incorporating the effects of channel length modulation has been presented for multi-layered gate material engineered trapezoidal recessed channel (MLGME-TRC) MOSFET and the expression for linearity performance metrics, i.e. higher order transconductance coefficients: g m1 , g m2 , g m3 , and figure-of-merit (FOM) metrics; V IP2 , V IP3 , IIP3 and 1-dB compression point, has been obtained. It is shown that, the incorporation of multi-layered architecture on gate material engineered trapezoidal recessed channel (GME-TRC) MOSFET leads to improved linearity performance in comparison to its conventional counterparts trapezoidal recessed channel (TRC) and rectangular recessed channel (RRC) MOSFETs, proving its efficiency for low-noise applications and future ULSI production. The impact of various structural parameters such as variation of work function, substrate doping and source/drain junction depth (X j ) or negative junction depth (NJD) have been examined for GME-TRC MOSFET and compared its effectiveness with MLGME-TRC MOSFET. The results obtained from proposed model are verified with simulated and experimental results. A good agreement between the results is obtained, thus validating the model.

show abstract

“…Oscillators, low noise amplifiers and power amplifiers shown significant vulnerability to HCs. Mixers also suffer from HC effects, which have been introduced in [3,5]. However, the performance degradation in mixers has not been studied in details so far.…”

Section: Introductionmentioning

confidence: 99%

Voltage stress-induced performance degradation in NMOSFET mixer

Yang²,

Xiao

et al. 2005

IEICE Electron. Express

Self Cite

View full text Add to dashboard Cite

Abstract:This paper presents an insight into the performance degradation in Gilbert mixer due to the voltage stress-induced hot carrier effects. Analytical analysis relates the performance degradation with the model parameter shifts caused by voltage stress. The stressinduced parameter shifts are examined experimentally. Performance degradation in mixer is investigated through Spectre-RF simulation with the models extracted from measured data.

show abstract

MOSFET Linearity Performance Degradation Subject to Drain and Gate Voltage Stress

Cited by 30 publications

References 13 publications

Low-Power Gilbert Mixer Performance and a Study on Noise Parameters for UWB Frequencies

Low-Power Gilbert Mixer Performance and a Study on Noise Parameters for UWB Frequencies

Linearity-Distortion Analysis of GME-TRC MOSFET for High Performance and Wireless Applications

Voltage stress-induced performance degradation in NMOSFET mixer

Contact Info

Product

Resources

About