Leakage phenomena are increasingly affecting the performance of nanoelectronic devices, and therefore, advanced device simulators need to include them in an appropriate way. This paper presents the modeling and implementation of direct source-to-drain tunneling (S/D tunneling), gate leakage mechanisms (GLM) accounting for both direct and trap assisted tunneling, and nonlocal band-to-band tunneling (BTBT) phenomena in a multi-subband ensemble Monte Carlo (MS-EMC) simulator along with their simultaneous application for the study of ultrascaled fully depleted silicon on insulator, double-gate silicon on insulator, and FinFET devices. We find that S/D tunneling is the prevalent phenomena for the three devices, and it is increasingly relevant for short channel lengths. Index Terms-Band-to-band tunneling (BTBT), direct sourceto-drain tunneling (S/D tunneling), double-gate silicon on insulator (DGSOI), FinFET, fully depleted silicon on insulator (FDSOI), gate leakage current, Multi-Subband Ensemble Monte Carlo (MS-EMC) I. INTRODUCTION T HE aggressive reduction of device dimensions has increased the importance of short-channel effects (SCEs) and leakage mechanisms as relevant agents degrading the device performance and leading, for example, to the loss of gate control over the channel and the increase of the drain influence. The variation of the threshold voltage (V th) as the channel length decreases is one of the main effects that needs study, without losing sight of the fact that SCEs do not only affect V th but also the subthreshold characteristics contributing to off-state current degradation. The inclusion of additional physical phenomena is thus required in the modeling of new technological nodes, in order