Multi-cell soft errors at the 16-nm FinFET technology node

Tam, Nelson; Bhuva, B. L.; Massengill, L.W.; Ball, D. R.; McCurdy, Michael W.; Alles, Michael L.; Chatterjee, Indranil

doi:10.1109/irps.2015.7112730

Cited by 13 publications

(2 citation statements)

References 7 publications

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“…In fact, the factor of 5 accounts for the cross section curve of a recent bulk FinFET SRAM, as shown in Fig. 11, where our expression ( 12) is compared with experimental data reported in [29]. For comparison, the authors of the present study converted the original SEU cross sections given in the reference into the event cross sections, taking into account the multi-cell upset (MCU) multiplicity, which is also given in the article referred to.…”

Section: A Validity Of the Hypothesismentioning

confidence: 99%

Threshold and Characteristic LETs in SRAM SEU Cross Section Curves

Kobayashi

Uematsu

Hirose

2023

IEEE Trans. Nucl. Sci.

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Characterizing the sensitivity of a static random access memory (SRAM) to single-event upset (SEU) is an essential task for assuring its soft-error reliability. However, this task often imposes a burden because it usually requires many cycles of accelerator-based irradiation tests. A model recently proposed is a very simple exponential-type equation but has strong potential to reduce the burden because of its capability to predict SEU cross sections in various conditions. The aim of the present study is to revisit the model in terms of threshold parameters called threshold linear energy transfer (LET) and critical charge. Although these threshold parameters are widely used as key parameters that describe whether an SEU occurs or not, they are not seen in the model. This article explores such missing threshold parameters, suggesting that they successfully appear by introducing a factor of five to the original expression.

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Section: A Validity Of the Hypothesismentioning

confidence: 99%

Threshold and Characteristic LETs in SRAM SEU Cross Section Curves

Kobayashi

Uematsu

Hirose

2023

IEEE Trans. Nucl. Sci.

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“…The phenomenon of a radiation-induced strike affecting multiple transistors has been studied to some extent in [11], [12], [13] for planar MOSFETs but has not been understood to the same extent in FinFETs. Some studies with respect to FinFETs are performed in [14], [15] and they report that multiple cell upsets do occur in FinFET based SRAMs. Further, bulk FinFET based designs are reported to have higher soft error rate than that of SOI based designs [16].…”

Section: Introductionmentioning

confidence: 99%

Neutron-induced strike: Study of multiple node charge collection in 14nm FinFETs

Rao,

Desai

2017

Preprint

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FinFETs have replaced the conventional bulk CMOS transistors in the sub-20nm technology. One of the key issues to consider is, the vulnerability of FinFET based circuits to multiple node charge collection due to neutron-induced strikes. In this paper, we perform a device simulation based characterization study on representative layouts of 14nm bulk FinFETs in order to study the extent to which multiple transistors are affected. We find that multiple transistors do get affected and the impact can last up to five transistors away (~200nm). We show that the potential of source/drain regions in the neighborhood of the strike is a significant contributing factor. In the case of multi-fin FinFETs, the charge collected per fin is seen to reduce as the number of fins increase. Thus, smaller FinFETs are susceptible to high amounts of charge collection.

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Quantification of the Extent of Multiple Node Charge Collection in 14 nm Bulk FinFETs

Rao

Desai

2020

Lecture Notes in Electrical Engineering

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Multi-cell soft errors at the 16-nm FinFET technology node

Cited by 13 publications

References 7 publications

Threshold and Characteristic LETs in SRAM SEU Cross Section Curves

Threshold and Characteristic LETs in SRAM SEU Cross Section Curves

Neutron-induced strike: Study of multiple node charge collection in 14nm FinFETs

Quantification of the Extent of Multiple Node Charge Collection in 14 nm Bulk FinFETs

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