Multi-Chip Patch in Low Stress Polymer Foils based on an Adaptive Layout for Flexible Sensor Systems

Albrecht, Bjoern; Alavi, Golzar; Elsobky, Mourad; Ferwana, Saleh; Passlack, Ulrike; Harendt, Christine; N, Burghartz Joachim

doi:10.1109/estc.2018.8546380

Cited by 16 publications

(5 citation statements)

References 10 publications

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“…If rotation occurs, the adaptive layout technique can be used for correction . This is enabled by the use of a laser direct writing system which, unlike conventional direct exposure systems, offers the possibility to mask-less exposure allowing the design to be changed and adapted within the entire processing . Another challenge is the spin-coating process.…”

Section: Resultsmentioning

confidence: 99%

“…42 This is enabled by the use of a laser direct writing system which, unlike conventional direct exposure systems, offers the possibility to mask-less exposure allowing the design to be changed and adapted within the entire processing. 43 Another challenge is the spin-coating process. the accuracy of the laser direct writing system during the photolithographic structuring of the pad opening and the ensuing dry etching processes.…”

Section: ■ Results and Discussionmentioning

confidence: 99%

“… 42 This is enabled by the use of a laser direct writing system which, unlike conventional direct exposure systems, offers the possibility to mask-less exposure allowing the design to be changed and adapted within the entire processing. 43 Another challenge is the spin-coating process. High-viscosity polymers and photoresists with resist thicknesses up to 40 μm are used for coating the above embedded Si chips to prevent corrosion and for the via opening process which are depicted in Figure 4 a steps 3 and 4.…”

Section: Resultsmentioning

confidence: 99%

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Flexible Ultrathin Chip-Film Patch for Electronic Component Integration and Encapsulation using Atomic Layer-Deposited Al₂O₃–TiO₂ Nanolaminates

Passlack

Simon

Bucher³

et al. 2023

ACS Appl. Mater. Interfaces

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Plasma-enhanced atomic layer deposition (PEALD) is utilized to improve the barrier properties of an organic chip-film patch (CFP) when it is used as an implant to prevent moisture and ions from migrating into the embedded electronic circuits. For this purpose, surface condition and material properties of eight modifications of Al 2 O 3 −TiO 2 nanolaminates sequentially deposited on polyimide PI-2611 films are evaluated in detail. The effect of stress-induced warpage of the deposited Al 2 O 3 −TiO 2 on the wafer level is calculated with the Stoney equation and reveals higher tensile stress values while increasing the thickness of Al 2 O 3 −TiO 2 nanolaminates from 20 up to 80 nm. Contact angle measurement and atomic force microscopy are used to investigate the surface energy and wettability, as well as the surface morphology of polyimide−Al 2 O 3 −TiO 2 interfaces. We show that plasma treatment of pristine polyimide leads to an enhanced adhesion force of the PEALdeposited layer by a factor of 1.3. The water vapor transmission rate (WVTR) is determined by exposing the coated polyimide films to 85% humidity and 23 °C and yields down to 1.58 × 10 −3 g(H 2 O)/(m 2 d). The data obtained are compared with alternative coating processes using the polymers parylene-C and benzocyclobutene (BCB). The latter shows higher WVTR values of 1.2 × 10 −1 and 1.7 × 10 −1 g(H 2 O)/(m 2 d) compared to the PEALD−PI-2611 systems, indicating lower barrier properties. Two Al 2 O 3 −TiO 2 modifications with low WVTR values have been chosen for encapsulating the CFP substrates and exposing them in a long-time experiment to chemical and mechanical loads in a chamber filled with phosphatebuffered saline at 37 °C, pH 7.3, and a cyclically applied pressure of 160 mbar (∼120 mm Hg). The electrical leakage behavior of the CFP systems is measured and reveals reliable electrical long-term stability far beyond 11 months, highlighting the great potential of PEALD-encapsulated CFPs.

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Section: Resultsmentioning

confidence: 99%

Section: ■ Results and Discussionmentioning

confidence: 99%

“… 42 This is enabled by the use of a laser direct writing system which, unlike conventional direct exposure systems, offers the possibility to mask-less exposure allowing the design to be changed and adapted within the entire processing. 43 Another challenge is the spin-coating process. High-viscosity polymers and photoresists with resist thicknesses up to 40 μm are used for coating the above embedded Si chips to prevent corrosion and for the via opening process which are depicted in Figure 4 a steps 3 and 4.…”

Section: Resultsmentioning

confidence: 99%

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Flexible Ultrathin Chip-Film Patch for Electronic Component Integration and Encapsulation using Atomic Layer-Deposited Al₂O₃–TiO₂ Nanolaminates

Passlack

Simon

Bucher³

et al. 2023

ACS Appl. Mater. Interfaces

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“…The newest developed antenna and its RF-chip were produced using the chip-film patch (CFP) process, which is specifically developed by the Institut für Mikroelektronik Stuttgart (IMS-CHIPS) and is particularly suitable for manufacturing Hybrid Systems in Foil with a total thickness between 50 μm and 70 μm [18]. This wafer-level processing realizes combining silicon chips with large area electronics, such as organic thin-film transistors, sensors, and antennas with CMOS-compatible equipment.…”

Section: Chip-film Patch Processmentioning

confidence: 99%

Adaptive triple-fed antenna and thinned RF-chip integration into ultra thin flexible polymer foil

Fischer

Özbek

Wang

et al. 2023

Int. J. Microw. Wireless Technol.

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Attaching a wireless transmission system comprising a radio frequency (RF)-chip and a dipole antenna to dielectric material of largely different permittivity leads to strong variation of the antenna feed impedance. Due to the severe impedance mismatch between the RF-chip and the antenna, the performance of the system may deteriorate drastically. The proposed antenna provides three feed points, which show respective feed-point match to 100 Ohm balanced feeds for three different dielectric environments (free-space and half-spaces of permittivity 4 and 42, respectively). Thereby, the RF-chip incorporates three 100 Ohm balanced output ports that are connected to the antenna from whom only one can be selected to provide the output signal. The respective other two output ports are shorted by an internal switching circuit that is controlled by external DC voltages. The measurement of the reflection coefficient of the stand-alone antenna and the chip agree well with the simulations, allowing to interconnect these two components. Further, the radiation pattern of the whole system is measured for two different scenarios showing good functionalities.

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“…Durimide provides the mechanical flexibility of the system-in-foil (SiF), reinforces the layer stack, and shifts the brittle BCB near the neutral line of stress. The two-polymer CFP technology is compatible with CMOS processing which enables a fine-pitch interconnectivity using photo-lithography and IC-production facilities (CMOS backend process) [6]. The schematic cross-section of the two-polymer ultra-thin chip embedding in the CFP technology is illustrated in Fig.…”

Section: Two-polymer Cfp Technologymentioning

confidence: 99%

Toward a flexible and adaptive wireless hub by embedding power amplifier thinned silicon chip and antenna in a polymer foil

Alavi

Özbek

Rasteh

et al. 2019

Int. J. Microw. Wireless Technol.

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A flexible and adaptive energy-efficient high-speed wireless hub is developed in polymer foil as a Hybrid System-in-Foil (HySiF) using Chip-Film Patch (CFP) technology. In this matter, the SiGe BiCMOS silicon chips (2.39 × 1.65 mm2) are thinned down to 45 μm and are embedded face-up inside a two-polymer CFP carrier. The active pads of the embedded silicon chips inside foil are extended to the surface of the foil to interconnect to the antenna on the foil. The integrated hybrid system has a signal transmission at 5–6 GHz frequency band. The overall thickness of the system is below 100 μm and its bendability is down to 4 mm radius of curvature. The designed and fabricated PA silicon chips operate at 50 mA with a 1.5 V supply voltage. Therefore, in addition to the high lateral thermal resistance of the thinned chip, self-heating loop inside polymer due to the low thermal conductivity of the embedding polymer raises the system temperature. Consequently, the thermal behavior and RF performance of the PA chip under different conditions are investigated. Moreover, the antenna with the required carrier frequency is simulated, fabricated, and measured on top of the polymer foil as a stand-alone system in the flexible CFP.

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Multi-Chip Patch in Low Stress Polymer Foils based on an Adaptive Layout for Flexible Sensor Systems

Cited by 16 publications

References 10 publications

Flexible Ultrathin Chip-Film Patch for Electronic Component Integration and Encapsulation using Atomic Layer-Deposited Al₂O₃–TiO₂ Nanolaminates

Flexible Ultrathin Chip-Film Patch for Electronic Component Integration and Encapsulation using Atomic Layer-Deposited Al₂O₃–TiO₂ Nanolaminates

Adaptive triple-fed antenna and thinned RF-chip integration into ultra thin flexible polymer foil

Toward a flexible and adaptive wireless hub by embedding power amplifier thinned silicon chip and antenna in a polymer foil

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Multi-Chip Patch in Low Stress Polymer Foils based on an Adaptive Layout for Flexible Sensor Systems

Cited by 16 publications

References 10 publications

Flexible Ultrathin Chip-Film Patch for Electronic Component Integration and Encapsulation using Atomic Layer-Deposited Al2O3–TiO2 Nanolaminates

Flexible Ultrathin Chip-Film Patch for Electronic Component Integration and Encapsulation using Atomic Layer-Deposited Al2O3–TiO2 Nanolaminates

Adaptive triple-fed antenna and thinned RF-chip integration into ultra thin flexible polymer foil

Toward a flexible and adaptive wireless hub by embedding power amplifier thinned silicon chip and antenna in a polymer foil

Contact Info

Product

Resources

About

Flexible Ultrathin Chip-Film Patch for Electronic Component Integration and Encapsulation using Atomic Layer-Deposited Al₂O₃–TiO₂ Nanolaminates

Flexible Ultrathin Chip-Film Patch for Electronic Component Integration and Encapsulation using Atomic Layer-Deposited Al₂O₃–TiO₂ Nanolaminates