Multi-Context TCAM-Based Selective Computing: Design Space Exploration for a Low-Power NN

Abstract

In this paper, we propose a low-power memorybased computing architecture, called selective computing architecture (SCA). It consists of multipliers and an LUT (Look-Up Table)-based component, that is multi-context ternary content-addressable memory (MC-TCAM). Either of them is selected by input-data conditions in neural-networks (NNs). Compared with quantized NNs, a higher accurate multiplication can be performed with low-power consumption in the proposed architecture. If input data stored in the MC-TCAM appears, the corresponding multiplication results for multiple weights are obtained. The MC-TCAM stores only shorter length of input data, resulting in achieving a low-power computing. The performance of the SCA is determined by three physical parameters concerning the configuration of MC-TCAM. The power dissipation of the target NN can be minimized by exploring these parameters in the design space. The hardware based on the proposed architecture is evaluated using TSMC 65 nm CMOS technology and MTJ model. In the case of speech command recognition, the power consumption at the multiplication of the first convolutional layer in a convolutional NN is reduced by 67% compared to the solution relying only on multipliers.

A 43pJ per Inference CBNN-based Compute-in-sensor Associative Memory in 28nm FDSOI

“…However, the associative memory is implemented on an external FPGA, which constrains the system for embedded operation and is not relevant for performance comparison. A state-of-the-art associative memory implementing a multi-context ternary content addressable memory (T-CAM) is integrated in an ASIC used for speech recognition in [8]. It is combined with an SRAM storing 96kb of data.…”

In‐Memory Search for Highly Efficient Image Retrieval

“…In-memory search is a promising hardware paradigm where search and computing tasks are performed on content-addressable memories (CAMs), especially emerging nonvolatile memorybased CAMs, such as memristor, [11][12][13][14][15] phase change memory (PCM) [16][17][18] and ferroelectric transistor. [19][20][21][22] The nonvolatile CAMs have shown great promise in machine learning, [23][24][25] pattern matching, [26][27][28] and neural networks [29][30][31] due to their massive parallelism. However, due to the no-ideal factor such as device variation, the accuracy loss of image search is inevitable.…”

Ternary Full Adder Designs Employing Unary Operators and Ternary Multiplexers

“…In the last decade, many ternary circuit designs have been demonstrated using CNFET technology, such as ternary logic gates, memory, and combinational circuits [ 2 , 3 , 4 , 5 , 6 ]. More specifically, several ternary full adders have been proposed [ 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 , 16 , 17 , 18 ].…”