Multi-spin-flip engineering in an Ising machine

Shirai, Tatsuhiko; Togawa, Nozomu

doi:10.1109/tc.2022.3178325

Cited by 5 publications

(12 citation statements)

References 47 publications

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“…The merge method [18] engineers a multi-spin flip on SAbased Ising machines by deforming the Hamiltonian H. In this method, one or more spins are merged into another spin to describe multiple spins using a single spin. When spin i is merged into spin j, a flip of spin i is synchronized with a flip of spin j, resulting in the two-spin flip.…”

Section: B Merge Methods 1) Overviewmentioning

confidence: 99%

“…The previous work [18] has demonstrated that the merge method improves the search performance of SA-based Ising machines when constrained COPs are solved. However, it is necessary to integrate the merge method with Ising-machine hardware for truly evaluating its benefit.…”

Section: Gpu-oriented Merge Methodsmentioning

confidence: 99%

“…The interactions connected to spin j and the bias on spin j are updated when spin i is merged into spin j (lines 9-10). After completing the sequential merge attempt for all spins, s i and m i are updated for merged spins to satisfy m mi = m i (lines [13][14][15][16][17][18].…”

Section: ) Algorithm Of Merge Processmentioning

confidence: 99%

“…In recent years, the merge method [18] was proposed to provide a multi-spin-flip capability for SA-based Ising machines. It can engineer a multi-spin flip using single-spinflip MCMC methods by temporarily generating Hamiltonian H ′ that is deformed from the original Hamiltonian H. For example, when a single spin i in H ′ describes multiple spins 1, 2, and 3 in H, a single-spin flip of spin i is equivalent to the three-spin flip; i.e., their spin values σ 1 , σ 2 , and σ 3 are simultaneously changed to −σ 1 , −σ 2 , and −σ 3 , respectively.…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

A GPU-Based Ising Machine With a Multi-Spin-Flip Capability for Constrained Combinatorial Optimization

Jimbo,

Shirai,

Togawa

et al. 2024

IEEE Access

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Ising machines are domain-specific computers that solve combinatorial optimization problems (COPs). They utilize an Ising model to represent a COP and search for the optimal spin configuration of the Ising model to solve the COP. Most Ising machines are based on simulated annealing (SA) and update the spin configuration according to single-spin-flip Markov Chain Monte Carlo methods. However, supporting a multi-spin flip is important to enhance the search performance of SA-based Ising machines when constrained COPs are solved. In this paper, we extend the merge method, which was introduced to provide a multi-spin-flip capability for SA-based Ising machines, and formulate it as a series of matrix multiplications that can be executed on a graphics processing unit (GPU) efficiently. We then construct a GPU-based Ising machine that implements the GPU-oriented merge method together with an extended SA algorithm. We finally demonstrate its superiority over the state-of-the-art GPU-based Ising machine for quadratic knapsack problems.INDEX TERMS constrained combinatorial optimization, graphics processing unit (GPU), Ising machine, Ising model, multi-spin flip, simulated annealing (SA)

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Section: B Merge Methods 1) Overviewmentioning

confidence: 99%

Section: Gpu-oriented Merge Methodsmentioning

confidence: 99%

Section: ) Algorithm Of Merge Processmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

A GPU-Based Ising Machine With a Multi-Spin-Flip Capability for Constrained Combinatorial Optimization

Jimbo,

Shirai,

Togawa

et al. 2024

IEEE Access

Self Cite

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show abstract

“…machines search for the lowest-energy state of a QUBO, which is called the ground state. Efficient methods have been proposed for improving the performance of Ising machines [17]- [20]. The optimal solution of a combinatorial optimization problem is obtained from the ground state.…”

Section: Optimum Optimummentioning

confidence: 99%

Spin-Variable Reduction Method for Handling Linear Equality Constraints in Ising Machines

Shirai

Togawa

2023

IEEE Trans. Comput.

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We propose a spin-variable reduction method for Ising machines to handle linear equality constraints in a combinatorial optimization problem. Ising machines including quantum-annealing machines can effectively solve combinatorial optimization problems. They are designed to find the lowest-energy solution of a quadratic unconstrained binary optimization (QUBO), which is mapped from the combinatorial optimization problem. The proposed method reduces the number of binary variables to formulate the QUBO compared to the conventional penalty method. We demonstrate a sufficient condition to obtain the optimum of the combinatorial optimization problem in the spin-variable reduction method and its general applicability. We apply it to typical combinatorial optimization problems, such as the graph k-partitioning problem and the quadratic assignment problem. Experiments using simulated-annealing and quantum-annealing based Ising machines demonstrate that the spin-variable reduction method outperforms the penalty method. The proposed method extends the application of Ising machines to larger-size combinatorial optimization problems with linear equality constraints.

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A Genuine-Equilibrium Monte Carlo Sampling-Based Effective Algorithm for Fully-Connected Ising Models

Wang,

Jiang,

Zhang

et al. 2023

2023 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)

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Multi-spin-flip engineering in an Ising machine

Cited by 5 publications

References 47 publications

A GPU-Based Ising Machine With a Multi-Spin-Flip Capability for Constrained Combinatorial Optimization

A GPU-Based Ising Machine With a Multi-Spin-Flip Capability for Constrained Combinatorial Optimization

Spin-Variable Reduction Method for Handling Linear Equality Constraints in Ising Machines

A Genuine-Equilibrium Monte Carlo Sampling-Based Effective Algorithm for Fully-Connected Ising Models

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