Multi-Unit Serial Polynomial Multiplier to Accelerate NTRU-Based Cryptographic Schemes in IoT Embedded Systems

Abstract

Concern for the security of embedded systems that implement IoT devices has become a crucial issue, as these devices today support an increasing number of applications and services that store and exchange information whose integrity, privacy, and authenticity must be adequately guaranteed. Modern lattice-based cryptographic schemes have proven to be a good alternative, both to face the security threats that arise as a consequence of the development of quantum computing and to allow efficient implementations of cryptographic primitives in resource-limited embedded systems, such as those used in consumer and industrial applications of the IoT. This article describes the hardware implementation of parameterized multi-unit serial polynomial multipliers to speed up time-consuming operations in NTRU-based cryptographic schemes. The flexibility in selecting the design parameters and the interconnection protocol with a general-purpose processor allow them to be applied both to the standardized variants of NTRU and to the new proposals that are being considered in the post-quantum contest currently held by the National Institute of Standards and Technology, as well as to obtain an adequate cost/performance/security-level trade-off for a target application. The designs are provided as AXI4 bus-compliant intellectual property modules that can be easily incorporated into embedded systems developed with the Vivado design tools. The work provides an extensive set of implementation and characterization results in devices of the Xilinx Zynq-7000 and Zynq UltraScale+ families for the different sets of parameters defined in the NTRUEncrypt standard. It also includes details of their plug and play inclusion as hardware accelerators in the C implementation of this public-key encryption scheme codified in the LibNTRU library, showing that acceleration factors of up to 3.1 are achieved when compared to pure software implementations running on the processing systems included in the programmable devices.

To mitigate primary user emulation attack trajectory using cognitive single carrier frequency division multiple access approaches: Towards next generation green IoT

“…An eavesdropper can target the principal system, and genuine SUs can operate as friendly jamming to prevent data spillage 89 . In Reference 90, SU aided anti‐eavesdropping communication for primary system defense. The PUs were the game leaders, and the SUs were the followers in a Stackelberg game‐based cooperative jamming strategy.…”

Development of modification of the post-quantum public-key cryptosystem NTRUENCRYPT

“…To overcome this shortcoming, Karatsuba's algorithm is used only for those polynomials whose degree is greater than 32. To ensure sufficient cryptographic strength of the algorithm, it is necessary to correctly choose the parameters N, q, and p. Table 1 presents parameters that are safe according to [24]. At the same time, parameter sets 1-4 provide the smallest key size for the required cryptographic strength, parameters 5-8 provide the best performance with a larger key size, and parameter sets 9-12 are selected so as to minimize the value of C for the required cryptographic strength level, which is calculated by the formula:…”

A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem

“…Although different works such as [13] or [14] follow a fullparallel design, the hardware implementation of this work has followed a serial architecture, applying the same strategy that is used in [15]. Fig.…”

“…Previously published works [13], [14] and [15] introduced an Arithmetic Unit (AU), that instead of perform a multiplication between coefficients, uses the reduced number of elements presented in r(x) to perform an addition (for r j = 1) or a subtraction (for r j = −1). This work undergoes some changes to this AU, which instead of using a multiplexer, it now utilizes a logic-gate AND as illustrated in Fig.…”