Multicast-Aware Mapping Algorithm for On-chip Networks

Abstract

Networks-on-Chip (NoCs for short) are known as the most scalable and reliable on-chip communication architectures for multi-core SoCs with tens to hundreds IP cores. Proper mapping the IP cores on NoC tiles (or assigning threads to cores in chip multiprocessors) can reduce end-to-end delay and energy consumption. While almost all previous works on mapping consider higher priority for the application's flows with higher required bandwidth, a mapping strategy, presented in this paper, is introduced that considers multicast communication flows in addition to the normal unicast flows. To this end, multicast and unicast traffic flows are first characterized in terms of some new metrics which are then used for arranging communication flows based on their volume and priority. A heuristic approach is used to assign IP cores to NoC tiles. Simulation results for both synthetic and real applications show up to 49% (28% on average) performance improvement and 44% (22% on average) energy saving when compared to the best known mapping algorithm, nMap.

Models of computation for NoC mapping: Timing and energy saving awareness

“…Fig. 3(b) displays the Cqe, where the edge labels are (w AB , f AB )=(15, 8), (w AF , f AF )=(15, 0), (w BF , f BF )= (40,20), (w EA , f EA )= (35,15), (w FB , f FB )= (15,10). Fig.…”

“…Normally, static energy is responsible for the smallest part of the energy consumption; however, for deep-submicron technologies, the designer cannot neglect the leakage current effect. ST Energy and time reduction Mesh CTG (CqPqd) [11]; [9] ST Energy, area and time reduction Clos, torus, mesh Core graph (Cq) [12] ST Energy saving and bandwidth reservation Mesh APCG (Cq) [13] ST Energy and time reduction Mesh CWM, CDM (Cq, Cqd) [14] ST Energy and time reduction Mesh CDM, CDCM (Cqd, CqdPq) [13] ST Energy and latency reduction Mesh, torus, fat-tree ACP (Cqo) [15] ST Energy saving Mesh ECWM (Cq) [16]; [17]; [18] ST Energy and area reduction Mesh, torus Core graph (Cq) [19] ST Hops minimization and thermal balance Mesh APCG (Cq) [20] ST Energy and area reduction, QoS Ad hoc Multigraph (Cq) [21] ST Energy saving Mesh Task graph (Pqd) [22] DY Energy and time minimization Mesh ACG (CqPq) [23] ST Energy saving Mesh WCTG (Cq) [24] DY Energy, channel occupation, latency reduction Mesh CDCM (CqdPq) [25] ST Energy reduction Regular tile MACTG (CqPqd) [26] DY Energy and congestion reduction Mesh CTG (CqPqd) [27] ST Energy saving Regular tile ACG (CqdPq) [28] ST Latency minimization and throughput increase Mesh Task graph (Cq) [29] ST Energy and latency reduction Mesh ACG (CqPq) [30] ST Energy saving Mesh Task graph (CqPqd) [31] DY Load balance and comm. overhead reduction Mesh ATG (CqoPqo) [32] DY Hotspot avoidance, uniform energy consumption Mesh CTG (Pqd) [33] ST Hops minimization Mesh TFG (Cqo) [34] DY Energy and time saving Mesh ATG (Cqd) [35] ST Energy and latency reduction Ad hoc Core graph (Cq) [36] DY, ST Time saving and real-time constraints fulfilling Abstract model KPN (CqoPqo) [37] DY, ST Energy efficiency Mesh ACG (Cq) [38] DY Time and energy saving Mesh DAG (Cqd) [39] DY, ST Energy saving, load balancing Mesh TCG (Cq)…”