Multiconstraint Static Scheduling of Synchronous Dataflow Graphs Via Retiming and Unfolding

Abstract

Abstract-Synchronous dataflow graphs (SDFGs) are widely used to represent DSP algorithms and streaming media applications. This paper presents several methods for binding and scheduling SDFGs on a multiprocessor platform. Exploring the state-space generated by a self-timed execution (STE) of an SDFG, we present an exact method for static rate-optimal scheduling of SDFGs via implicit retiming and unfolding. By modeling a constraint as an extra enabling condition for the STE, we get a constrained STE which implies a schedule under the constraint. We present a general framework for scheduling SDFGs under constraints on the number of processors, buffer sizes, auto-concurrency, or combinations of them. Exploring the state-space generated by the constrained STE, we can check whether a retiming, which leads to a rate-optimal schedule under the processor (or memory) constraint, exists. Combining this with a binary search strategy, we present heuristic methods to find a proper retiming and a static scheduling that schedules the retimed SDFG with optimal rate and with as few processors (or as little storage space) as possible. None of the methods explicitly converts an SDFG to its equivalent homogenous SDFG, the size of which may be tremendously larger than the original SDFG. We perform experiments on several models of real applications and hundreds of synthetic SDFGs. The results show that the exact method outperforms existing methods significantly; our heuristics reduce the resources used and are computationally efficient.

Exploring Multi-Reader Buffers and Channel Placement During Dataflow Network Mapping to Heterogeneous Many-Core Systems

“…When analyzing dataflow, scheduling strategies applied at compile time are beneficial [11]. E.g., Self-Timed Execution (STE) [13,26] simulates the execution of a dataflow graph by using so-called state transformations. The state of a DFG is encoded as a set of variables representing the current state of the system.…”

A Fast Heuristic to Pipeline SDF Graphs

“…Multiple works [21,12] addressed the optimal finding of a retiming to reduce the makespan of a graph. Additionally, [21] accepts a constraint on the maximum number of processors, at the cost of non-optimality. Both use symbolic execution of a partially unfolded SDF graph to find a retiming.…”

Empirical model-based performance prediction for application mapping on multicore architectures

“…the design requirements. The analyses typically rely on system-level simulations of application specification in C on FPGA platform [13], on analytical models [14,15] for a fast evaluation of different mapping scenarios, or on UML-based model-driven design frameworks [16].…”