Multifunctional Interfacial Layers from a One-Step Process for Effective Charge Capturing and Erasing in Low-Voltage-Driven Organic Thin-Film Transistors

Abstract

The microstructure-dependent charge capturing and releasing behavior of dielectrics influences the memory characteristics of organic thin-film transistors (OTFTs). We use polyimide (PI) as the charge storage dielectric and incorporate an electron acceptor, namely, [6,6]-phenyl-C61-butyric acid methyl ester (PCBM), into PI through a simple one-step process to fabricate low-voltage-driven pentacene OTFT-based electrical programming/optical easing nonvolatile memories. Without the PCBM component, the OTFTs with the single-component PI layer exhibit almost no memory characteristics. After the incorporation of PCBM into the PI layer, the programming capacity of the OTFTs could reach 0.85 V at a low writing voltage of −3 V. Investigations on the microstructures and the impedance of the various PI layers indicate that the effect of phase separation coupled with PI dilution leads to the formation of an interfacial layer composed of thin PCBM regions and polar groups of PI between pentacene and PI layers. In the electrical programming process, the interfacial layer plays hole-capturing and -blocking roles to retain the programmed holes and achieve efficient hole programming. Under red-light irradiation, the pentacene and interfacial layers form a large p–n heterojunction area to provide electrons for recombination with the programmed holes, thereby achieving efficient hole erasure without applying any erasing voltage. Thus, low-voltage OTFT memory devices with nondestructive and energy-saving charge erasing can be realized. The discovered phenomenon can pave the way for the development of a highly efficient organic memory technology.

Photoerasable Organic Field-Effect Transistor Memory Based on a One-Step Solution-Processed Hybrid Floating Gate Layer

“…In short, V th can be reset when the light intensity is up to 2 mW cm −2 and exposure duration is up to 3 s. Compared to the optical programming time or erasing time reported previously, typically 3−120 s for programming and 1−30 s for erasing, the light reset time of 3 s is much improved (Table 1). 1,[24][25][26][27][28][29]51,52 In addition, the light intensity used in the test is low and comparable to that of the reported photonic memory, indicating that our memory devices exhibit good light-erasing performance. 1,[24][25][26][27][28][29]51,52 For optical erasing memory, only a single beam of light can erase completely, leading to great potential applications.…”

Organic thin film transistors‐based biosensors

“…High operational voltage is another limiting factor and might contribute to unstable electrical signal outputs. 49 To prevent this, various charge storage layers 50 have been used to develop low-voltage (<−2 V) OFET memory devices, as shown in Figure 3D. By incorporating [6,6]-phenyl-C 61 -butyric acid methyl ester into polyimide (PI), an interfacial charge storage layer is formed between pentacene and the PI, which guarantees efficient carrier programming and lowvoltage operation.…”

“…D, Structural diagram of a pentacene‐based low‐voltage‐driven OFET memory device (left) and transfer curves based on different charge storage layers (right). Reproduced with permission from Reference 50. Copyright 2020, American Chemical Society.…”

Hybrid Floating Gate Memory with a Large Memory Window Based on the Sandwich Structure

“…] ,, and charge-trapping materials [quantum dots, 6,13-bis­(triisopropylsilylethynyl)­pentacene, C 60 , [6,6]-phenyl-C 61 -butyric acid methyl ester (PCBM), etc. ] ,− in the same solvent. For HFGMs, the memory window can be increased by increasing the blending ratio of the charge-trapping material in the host organic polymer. − Nevertheless, an excessive mixing ratio may increase the chance of contact between the charge-trapping materials and between the charge-trapping layer and semiconductor channel layer, resulting in lateral and vertical leakage of the trapped charges. , …”