Multilayer photonic logic gate integrated into microelectronic chip

Abstract

An all-optical XOR gate was designed to take advantage of the previously unused silicon dioxide (SiO 2) interconnect layers in a microelectronic chip. The device relies on the coupling of modes between parallel waveguides and the interaction of the modes with the metal interconnects of a silicon chip to obtain a phase difference between input arms. When the signals from the two input arms interfere, the result is a logic XOR operation due to the phase difference. The design was numerically implemented, and a contrast of 18.7 dB was obtained with a 13.2-μm-long logic gate.

Photonic XOR with inherent loss compensation mechanism for memory cell implementation in a standard nanoscale very large-scale integrated fabrication process

“…The two gates are cascaded in such way that the input of one gate is connected to the output of the second one, creating a memory cell (the connection between the output of one of the gates to the input of the second one is made through a 3 dB coupler that allows some of the signal to be read at the output of the memory cell). The bending of the light beam is obtained by a method presented in [13] for the initial examination. The adaptation to the standard fabrication process is obtained by a micromirror instead of light bending by a photoniccrystal-like structure.…”