Multilevel flash cells and their trade-offs

Flash memory cells-an overview

“…The program-verify procedure trades off between the accuracy of and programming speed and imposes serious limitations to levels possibly stored in cells. It is therefore mandatory to accept a reduction of margin among levels [43].…”

Advancements in organic nonvolatile memory devices

“…The traditional way of achieving a low cost per bit is through the scaling size or multilevel storage, although multilevel storage has attracted more and more attention because of the fact that the scaling method is limited by photolithography [74]. The future goal of the memory cell is to obtain multibit information from a small cell by generating 2 n threshold-voltage (V th ) levels for n bits per cell [75]. All the studies mentioned above have focused on one-bit storage (with a 0 or 1 state).…”

Limited Magnitude Error Detecting Codes over Z_{q}

“…Unlike traditional single-level flash cells which can store only one bit, multilevel flash cells are programmed into one of q voltage levels, thereby storing log 2 q bits per cell. However, since the voltage difference between states is narrowed, multi-level flash memories are more prone to errors [10]. In case of error, cells are moved to adjacent threshold levels and hence we can assume that the maximum magnitude of the error is known [8].…”