1997
DOI: 10.1016/s0927-796x(97)00002-8
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Multilevel interconnections for ULSI and GSI era

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Cited by 340 publications
(139 citation statements)
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“…Copper has been identified as the conducting material of choice for a long time for connections in integrated circuits with submicron features. Its low electrical resistivity, high thermal conductivity, high electromigration resistance, excellent chemical and thermodynamic characteristics and low coefficient of resistance [1][2][3] are the key properties in electronic applications. Nanocrystalline copper films acquire potential related to its original physical and chemical characteristics [4,5].…”
Section: Introductionmentioning
confidence: 99%
“…Copper has been identified as the conducting material of choice for a long time for connections in integrated circuits with submicron features. Its low electrical resistivity, high thermal conductivity, high electromigration resistance, excellent chemical and thermodynamic characteristics and low coefficient of resistance [1][2][3] are the key properties in electronic applications. Nanocrystalline copper films acquire potential related to its original physical and chemical characteristics [4,5].…”
Section: Introductionmentioning
confidence: 99%
“…Copper, one of the most used interconnect material in silicon-based microelectronics and related devices, has low electrical resistivity and high electromigration resistance. 1,2 It has been reported that high purity Cu films bind well to the silica substrates if there are no hydroxyl groups at the Cu/SiO 2 interface. 3,4 A major issue, however, is the interaction between Cu and SiO 2 at the interface; this interaction can lead to the formation of oxidized Cu leading to the diffusion of Cu ions through the SiO 2 layer, which results in the degradation of the dielectric layer.…”
Section: Introductionmentioning
confidence: 99%
“…):30 % H 2 O 2 (3:l, v/v) for 10 min at ∌100°C, and etched in 2 % HF for 4 min; and sequentially in 30 % NH 3 .H 2 O:30 % H 2 O 2 :H 2 O (1:l:5, v/v) for 15 min to generate a thin silicon dioxide on the surface of the silicon substrate [20], and finally in H 2 SO 4 (conc. ):30 % H 2 O 2 (3:l, v/v) for 30 min.…”
Section: Preparation Of Substrate Si(100)mentioning
confidence: 99%
“…[1,2] However, a diffusion barrier/adhesion promoter is required to prevent copper diffusion into Si or SiO 2 , and enhance the adhesion of copper to SiO 2 or various low-j materials. [3] As feature sizes decrease to below 100 nm, traditional interfacial barrier layers such as Ti/TiN and Ta/TaN are no longer suitable because they do not provide adequate performance as thicknesses reduce to 20 nm or less in order to maximize the space available for a copper conductor. [4] Recently, Ramanath et al [5,6] demonstrated the use of near-zero thickness (<2 nm thick) self-assembled molecular monolayers (SAMs) as candidates for ultrathin barrier layers to prevent Cu diffusion into SiO 2 -based dielectrics.…”
Section: Introductionmentioning
confidence: 99%