2017 2nd International Conference for Convergence in Technology (I2CT) 2017
DOI: 10.1109/i2ct.2017.8226244
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Multiphase clock based vernier TDC on FPGA for on-chip temperature measurement application

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Cited by 5 publications
(4 citation statements)
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“…This process is performed by the combined effort of PLL, DCM, Array of counters and Adder shown in Fig.4. TDC used in [13] has dual PLL for time measurement with 4 phases and has an error of ¼ of time pulse. The 4 channel TDC implemented in [14] has time resolution in terms of ns.…”
Section: Time Detection Circuit (Tdc)mentioning
confidence: 99%
“…This process is performed by the combined effort of PLL, DCM, Array of counters and Adder shown in Fig.4. TDC used in [13] has dual PLL for time measurement with 4 phases and has an error of ¼ of time pulse. The 4 channel TDC implemented in [14] has time resolution in terms of ns.…”
Section: Time Detection Circuit (Tdc)mentioning
confidence: 99%
“…The Time-to-amplitude Converter (TAC) TDC is also easy to be implemented. However, TAC-TDC suffers from a large dead time, and the time resolution is limited by the ADC [7] . Another popular structure is the multiphase clock FPGA-TDC, which generates clocks with different phases and compares them to interpolate the clock.…”
Section: Introductionmentioning
confidence: 99%
“…Utilizing this relationship between power and supply-voltage, on-chip sensors have been successfully used for power-consumption monitoring on FPGAs [ZS + 13]. Additionally, measuring physical parameters such as temperature (beyond the scope of this paper) has also been shown to be viable [MMG17].…”
Section: Introductionmentioning
confidence: 99%