Multirate hybrid CT/DT cascade ΣΔ modulators with decreasing OSR of back-end DT stages

Abstract

This paper presents novel architectures of multirate hybrid cascade continuous-time/discrete-time !" modulators that take advantage of the potentially faster operation of the continuoustime part of the circuit, while keep a reduced sampling operation of the back-end discrete-time stages. Compared to conventional multirate !" modulators, the proposed architectures use a higher sampling rate in the front-end (continuous-time) stage of the modulator, whereas the back-end (discrete-time) stages operate at a lower rate. It is demonstrated that the intrinsic aliasing signal can be cancelled in the digital domain, with no additional analog hardware required. The resulting !" topologies are potentially faster than conventional multirate !" modulators, more power efficient than hybrid monorate architectures and more robust than cascade continuous-time implementations. The combination of these features results in a new class of !" modulators, very suited for the implementation of analog-to-digital converters in the next generation of broadband wireless telecom systems.

Multirate Downsampling Hybrid CT/DT Cascade Sigma-Delta Modulators

“…Following the same procedure as in previous sections, it can be shown that the -transform of the modulator output can be written in this case as (15) where . The above analysis can be applied to an arbitrary cascade 2-stage DS MR M with any value of .…”

“…The mentioned problems of MR Ms can be alleviated if the concept of multirating is redefined just in the opposite way as it was conceived, i.e., going from a upsampling multirate system-in which the front-end stage rate is increased in the subsequent stages-to a downsampling multirate system-in which the front-end (CT) stage operates at the highest rate, thus benefiting from their potentially faster operation [15]. This paper presents a new class of Ms, named downsampling MR Ms, whose principle of operation is based on a downsampling multirate system.…”

Efficient Multi-rate Hybrid Continuous-Time/Discrete-Time Cascade 2-2 Sigma-Delta Modulators for Wideband Telecom

“…Therefore, the quantization error signal, E 1 (z), that is fed to the back-end stage, is downsampled, thus containing aliased components at multiples of f s2 . This can be expressed in the Z-domain as [12]:…”

“…These problems can be alleviated if the signal is downsampled across the cascade modulator, so that the CT frontend stage operates at a higher clock rate than the DT back-end stage. This way, the dynamic requirements of the corresponding SC integrators can be relaxed and the resulting effective resolution can be improved by properly combining the different OSRs in a multi-rate operation [12].…”

Efficient Hybrid Continuous-Time/Discrete-Time ∑ Δ Modulators for Broadband Wireless Telecom Systems

“…The main drawback of H-Σ∆Ms is that their sampling rate is indeed limited by the DT part of the system. This problem can be alleviated if the signal is downsampled across the modulator, so that the CT front-end operates at a higher clock rate than the DT back-end, thus relaxing its dynamic requirements, and achieving the required specifications by properly combining the different OverSampling Ratios (OSRs) in a multirate operation [4]. However, a detailed analysis of their circuit non-ideal effects is required in order to systematize the circuit design and to optimize performance in terms of required signal bandwidth, effective resolution and power consumption.…”