Multiset signatures for transactional memory

Quislant, Ricardo; Gutiérrez, Eladio; Plata, Óscar; Zapata, Emilio L.

doi:10.1145/1995896.1995905

Cited by 8 publications

(5 citation statements)

References 36 publications

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“…Another important aspect of our proposal is that it is independent of the underlying signature implementation. Therefore all the proposed techniques [3,4,10,15,16,21] to improve the efficiency of a signatures can be used in SnCTM as well.…”

Section: Resultsmentioning

confidence: 99%

“…In order to reduce the impact on read-read dependencies signalling conflicts, they also proposed to use an small helper signature alongside the unified signature. Concurrently with work of Choi et al [4], Quislant et al proposed multiset signatures [16], which is also to combine read and write signatures into one. Their approach is enhanced using locality sensitive signatures [15] proposed by the same authors.…”

Section: Related Workmentioning

confidence: 98%

“…False positives lead to false transaction aborts and this degrades the performance of a TM system. Several proposals [3,4,10,15,16,21] have been made to reduce the number of false positives that occur in a hardware TM system. All of these approaches focus on the design and the implementation of signatures in hardware.…”

Section: Introductionmentioning

confidence: 99%

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SnCTM

Herath

Rosas-Ham

Luján

et al. 2012

Proceedings of the 9th Conference on Computing Frontiers

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Optimistic concurrency provided by Transactional Memory (TM) makes it a good candidate for maintaining synchronization in future multi-core processors. Speculative execution and bulk level conflict detection enable TM to provide synchronization at fine grain without the complexity of managing fine grain locks. Early hardware TM systems proposed to store the information needed for checking conflicts in the Level 1 (L1) cache, thereby limiting the size of a transaction to the size of the L1 cache. The introduction of signatures to TM systems removed this limitation and allowed transactions to be of any size.However signatures produce false positives which leads to performance degradation in TM systems. The objective of introducing signatures to TM is that the size of a transaction can be bigger than the L1 cache. Once signatures are integrated to a TM system, they are used to detect conflicts regardless of the size of a transaction. This means signatures are being used even for transactions that can store their read and write sets in the L1 cache.Based on this observation we propose SnCTM, a TM system that adaptively changes the source used to detect conflicts. In our approach, when a transaction fits in the L1 cache, cache line information is used to detect conflicts and signatures are used otherwise. By adaptively changing the source, SnCTM achieved up to 4.62 and 2.93 times speed-up over a baseline TM using lazy versioning and lazy conflict detection with two commonly used signature configurations. We also show that our system, even with a smaller signature (64 bit), can achieve performance comparable to a system with a perfect signature (8k bit).

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Section: Resultsmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 98%

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SnCTM

Herath

Rosas-Ham

Luján

et al. 2012

Proceedings of the 9th Conference on Computing Frontiers

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show abstract

“…While signatures can be designed to minimize aliasing [20], [21], [22], [28], an inherent limitation of cache-based conflicting detection is that the bookkeeping metadata is always recorded on a per-core basis. Using a data structure simile and observing the transactional metadata from a global perspective, the typical organization resembles an array of n hash-tables, where n is the number of cores.…”

Section: Reducing False Positives Of Signaturesmentioning

confidence: 99%

Efficient Eager Management of Conflicts for Scalable Hardware Transactional Memory

Titos-Gil

Acacio

Garcia

2013

IEEE Trans. Parallel Distrib. Syst.

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The efficient management of conflicts among concurrent transactions constitutes a key aspect that hardware transactional memory (HTM) systems must achieve. Scalable HTM proposals so far inherit the cache-based style of conflict detection typically found in bus-based systems, largely unaware of the interactions between transactions and directory coherence. In this paper, we demonstrate that the traditional approach of detecting conflicts at the private cache levels is inefficient when used in the context of a directory protocol. We find that the use of the directory as a mere router of coherence requests restricts the throughput of conflict detection, and show how it becomes a bottleneck under high contention. This paper proposes a scheme for conflict detection that decouples conflict detection from cache coherence in order to overcome pathological situations that degrade the performance of an eager HTM system. Our scheme places bookkeeping metadata at the directory, introducing it as a separate hardware module that leaves the coherence protocol unmodified. In comparison to a state-of-the-art eager HTM system, our design handles contention more efficiently, minimizes the performance degradation of false positives for signatures of similar hardware cost, and reduces the network traffic generated.

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“…Parallel multi-set bloom filters maintain one single parallel bloom filter for readset plus writeset addresses. Parallel multi-set shared bloom filters maintain one single parallel bloom filter for readset plus writeset addresses and treats both the readset plus writeset addresses as read-write address [14]. Parallel BF with BF indexing (PBF BF) uses BF to store inherent dependency values of an item, parallel BF by hash table indexing (PBF HT) utilizes hash table to accu-mulate inherent dependency values of an entity.…”

Section: Introductionmentioning

confidence: 99%

Locality Sensitive Hardware Signature Variants for Hardware Transactional Memory

Sangeetha

Vollala

Ramasubramanian

2021

Preprint

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Lock based techniques have its own limitations like priority inversion, convoying, and deadlock. Lock free techniques overcome those mentioned limitations. Transactional memory (TM) is one leading lock free technique used in recent multi core processors like Intel Haswell and IBM BlueGene/Q. TM has to do data versioning and conflict detection. For conflict detection probabilistic data structure called Bloom Filters are used. Bloom filter based hardware signatures are used in TM. In TM shared memory conflicts like RAW, WAR, and WAW hazards are handled by Bloom Filter (BF). Hardware signatures store memory addresses in hashed form on Bloom filters. Bloom filters are easy to use, performance efficient data structures lead to false positive but never support false negative. Locality sensitive hardware signatures reduce filter occupancy by sharing bits for the contiguous memory addresses, in turn reduces the false positive rate. This paper implements existing H3 – HS and LS – HS proposed by Ricardo Quislant et al. [13]. Also this paper proposes RS – HS, CS – HS, and RO – HS. RO – HS equally spreads addresses among bloom filters thereby reduces filter occupancy. In turn reduced filter occupancy leads to better False Positive Rate.

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Multiset signatures for transactional memory

Cited by 8 publications

References 36 publications

SnCTM

SnCTM

Efficient Eager Management of Conflicts for Scalable Hardware Transactional Memory

Locality Sensitive Hardware Signature Variants for Hardware Transactional Memory

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