Novel Patterning Technologies for Semiconductors, MEMS/NEMS and MOEMS 2020 2020
DOI: 10.1117/12.2551985
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Nanoimprint system alignment and overlay improvement for high volume semiconductor manufacturing

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Cited by 5 publications
(4 citation statements)
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“…2(c)], NIL patterning was performed using a NIL stepper (FPA-1200NZ2C, Canon) developed for semiconductor manufacturing. [23][24][25] The residual layer thickness and the pattern height of the NIL resist were 20 nm and 100 nm, respectively. The removal etching of the NIL residual layer was performed using a plasma etching system (Telius SCCM, Tokyo Electron).…”
Section: Methodsmentioning
confidence: 99%
“…2(c)], NIL patterning was performed using a NIL stepper (FPA-1200NZ2C, Canon) developed for semiconductor manufacturing. [23][24][25] The residual layer thickness and the pattern height of the NIL resist were 20 nm and 100 nm, respectively. The removal etching of the NIL residual layer was performed using a plasma etching system (Telius SCCM, Tokyo Electron).…”
Section: Methodsmentioning
confidence: 99%
“…In the lithography step [Fig. 2(b)], NIL patterning was performed using a NIL stepper (FPA-1200NZ2C, Canon) that was developed for semiconductor manufacturing applications [17][18][19] . The residual layer thickness and the pattern height of the NIL resist were 18 nm and 48 nm, respectively.…”
Section: Fabrication Processmentioning
confidence: 99%
“…Although this special layer sequence only serves demonstrational purposes it shows the potential of preparing several nanoimprinted layers on top of each other. For nanoimprinting of optical components alignment in the range of 100nm has been shown [23][24][25] . For the sample in Figure 1 the high index material was just droplet dispensed, with the hexagon-shape developing due to the underlying micropattern, which consisted of a hexagonal array of pillars.…”
Section: Thermalmentioning
confidence: 99%