Nanoporous Silicon with Graphene-like Coating for Pseudocapacitor Application

Abstract

This paper presents the results of studies of the nanoporous silicon structure, both with different pore depths (up to 180 μm) and with layers in which a graphene-like coating was synthesized on the inner surface of the pores. The nanoporous layers were characterized by SEM as well as IR and Raman spectroscopy. Cyclic voltammetry and galvanostatic charge–discharge data in 3 M H2SO4 are presented as well as the results of the cyclic stability of these characteristics for the nanoporous structure. It was found that the degree of electrolyte pre-impregnation significantly affected the electrochemical processes, and the capacitance values depended on the depth (thickness) of the nanoporous layer. Increasing the thickness of the porous layer led to an increase in area-normalized pseudocapacity and was limited only by the mechanical strength of the structure. Performance improvement was also achieved by synthesis of the graphene-like layer in the volume of the nanoporous structure. The electrodes (composite materials) proposed in the work showed one of the best capacitive characteristics (87 mF/cm2 with 100% capacity retention after 15,000 cycles) in comparison with the data reported in the literature at present.

N-Doped Graphene-like Film/Silicon Structures as Micro-Capacitor Electrodes

“…Before measurements, the sample was placed in an electrolyte overnight for wetting, and several cycles were preliminarily carried out for activation according to previous observations [21]. Weak and noisy CV curves before soaking in electrolytes are shown in Figure S2-0 in Supplementary Materials.…”

The Process and Mechanism of Preparing Nanoporous Silicon: Helium Ion Implantation

“…Therefore, the preparation of porous silicon has always been the focus of attention from scientific researchers. The traditional method is to form porous silicon on the silicon surface by chemical or electrochemical etching [10][11][12][13]. A novel preparation method was reported by the Yang group in 2010, they use nanosphere or block-copolymer lithography with deep reactive ion etching on thin monocrystalline silicon films to prepare porous silicon with uniform pore spacing of 55,140 or 350 nm [9,14].…”