Nanosecond Laser Anneal for BEOL Performance Boost in Advanced FinFETs

Lee, Rinus T. P.; Петров, Н. С.; Kassim, Joseph; Gribelyuk, M.; Yang, Ji Chul; Cao, Linjun; Yeap, Kong Boon; Shen, Tian; Zainuddin, Abu; Chandrashekar, A.; Ray, Subhabrata; Ramanathan, Eswar; Mahalingam, A.; Chaudhuri, Ritesh Ray; Mody, Jay; Damjanovic, Daniel; Sun, Zhen‐Gang; Sporer, R.; Tang, Teck Jung; Liu, H.; Liu, J.; Krishnan, Bharat

doi:10.1109/vlsit.2018.8510651

Cited by 9 publications

(3 citation statements)

References 4 publications

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“…In fact, LA has already been successfully integrated into the back end of lines (BEOL), outperforming conventional furnace anneals. [30][31][32] Silicon-on-insulator (SOI) wafers were used as the substrate. The top (100) silicon (Si) layer thickness was 70 nm, whereas that of the buried Si dioxide (SiO2) layer was 145 nm.…”

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confidence: 99%

Microsecond non-melt UV laser annealing for future 3D-stacked CMOS

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Rozé

Thuries

et al. 2022

Appl. Phys. Express

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Three-dimensional (3D) CMOS technology encourages the use of UV laser annealing (UV-LA) because the shallow absorption of UV light into materials and the process timescale typically from nanoseconds (ns) to microseconds (µs) strongly limit the vertical heat diffusion. In this work, µs UV-LA solid phase epitaxial regrowth (SPER) demonstrated an active carrier concentration surpassing 1 × 1021 at./cm3 in an arsenic ion-implanted silicon-on-insulator substrate. After the subsequent ns UV-LA known for improving CMOS interconnect, only a slight (⁓5%) sheet resistance increase was observed. The results open a possibility to integrate UV-LA at different stages of 3D-stacked CMOS.

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confidence: 99%

Microsecond non-melt UV laser annealing for future 3D-stacked CMOS

Tabata

Rozé

Thuries

et al. 2022

Appl. Phys. Express

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“…Its expected benefit is to enable a bamboo-like structure (i.e., reduction of electron scattering spots) in scaled BEOL lines thanks to the capability of processing wafers at a higher temperature (possibly melting Cu but not Ru) than in typical BEOL furnace annealing (e.g., less than 420 • C up to 1 h [71][72][73][74]). As shown in Figures 13 and 14, ns LA (non-UV) indeed shows such a potential [75,76].…”

Section: Beol Applicationsmentioning

confidence: 62%

Recent Progresses and Perspectives of UV Laser Annealing Technologies for Advanced CMOS Devices

et al. 2022

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The state-of-the-art CMOS technology has started to adopt three-dimensional (3D) integration approaches, enabling continuous chip density increment and performance improvement, while alleviating difficulties encountered in traditional planar scaling. This new device architecture, in addition to the efforts required for extracting the best material properties, imposes a challenge of reducing the thermal budget of processes to be applied everywhere in CMOS devices, so that conventional processes must be replaced without any compromise to device performance. Ultra-violet laser annealing (UV-LA) is then of prime importance to address such a requirement. First, the strongly limited absorption of UV light into materials allows surface-localized heat source generation. Second, the process timescale typically ranging from nanoseconds (ns) to microseconds (μs) efficiently restricts the heat diffusion in the vertical direction. In a given 3D stack, these specific features allow the actual process temperature to be elevated in the top-tier layer without introducing any drawback in the bottom-tier one. In addition, short-timescale UV-LA may have some advantages in materials engineering, enabling the nonequilibrium control of certain phenomenon such as crystallization, dopant activation, and diffusion. This paper reviews recent progress reported about the application of short-timescale UV-LA to different stages of CMOS integration, highlighting its potential of being a key enabler for next generation 3D-integrated CMOS devices.

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“…Extending Cu technology is still possible, especially by engineering the barrier/liner part [5][6][7]. On the other hand, nanosecond laser annealing (NLA) demonstrated a benefit on BEOL interconnects by enlarging the mean size of grains in both Cu [8,9] and Ru [10] lines. In fact, NLA allows to reach a much higher surface temperature than that of conventional BEOL limit (i.e., 400 ℃ for minutes), while conserving the functionality of surrounding devices thanks to its short timescale and shallow irradiation absorption.…”

Section: Introductionmentioning

confidence: 99%

Copper Large-Scale Grain Growth by UV Nanosecond Pulsed Laser Annealing

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Raynal

Rozé

et al. 2021

2021 IEEE International Interconnect Technology Conference (IITC)

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UV nanosecond pulsed laser annealing (UV NLA) enables both surface-localized heating and short timescale high temperature processing, which can be advantageous to reduce metal line resistance by enlarging metal grains in lines or in thin films, while maintaining the integrity and performance of surrounding structures. In this work UV NLA is applied on a typical Cu thin film, demonstrating a mean grain size of over 1 μm and 400 nm in a melt and sub-melt regime, respectively. Along with such grain enlargement, film resistivity is also reduced.

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Nanosecond Laser Anneal for BEOL Performance Boost in Advanced FinFETs

Cited by 9 publications

References 4 publications

Microsecond non-melt UV laser annealing for future 3D-stacked CMOS

Microsecond non-melt UV laser annealing for future 3D-stacked CMOS

Recent Progresses and Perspectives of UV Laser Annealing Technologies for Advanced CMOS Devices

Copper Large-Scale Grain Growth by UV Nanosecond Pulsed Laser Annealing

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