Nanostructured Dielectric Layer for Ultrathin Crystalline Silicon Solar Cells

Abstract

Nanostructures have been widely used in solar cells due to their extraordinary photon management properties. However, due to poor pn junction quality and high surface recombination velocity, typical nanostructured solar cells are not efficient compared with the traditional commercial solar cells. Here, we demonstrate a new approach to design, simulate, and fabricate whole-wafer nanostructures on dielectric layer on thin c-Si for solar cell light trapping. The optical simulation results show that the periodic nanostructure arrays on dielectric materials could suppress the reflection loss over a wide spectral range. In addition, by applying the nanostructured dielectric layer on 40 μm thin c-Si, the reflection loss is suppressed to below 5% over a wide spectra and angular range. Moreover, a c-Si solar cell with 2.9 μm ultrathin absorber layer demonstrates 32% improvement in short circuit current and 44% relative improvement in energy conversion efficiency. Our results suggest that nanostructured dielectric layer has the potential to significantly improve solar cell performance and avoid typical problems of defects and surface recombination for nanostructured solar cells, thus providing a new pathway towards realizing high-efficiency and low-cost c-Si solar cells.

Light absorption enhancement in ultrathin film solar cell with embedded dielectric nanowires

“…Such a layer is then annealed in vacuum at a temperature of 1000 °C for crystallization as shown in Fig. 8b [21][22][23][24][25][26] . Figure 8c shows the deposition of the second silicon layer with a thickness of 236 nm on p-type silicon and Si 3 N 4 layer at a temperature of 690 °C.…”

“…A deposition time of 15 min and temperature of 825 °C are needed to obtain a silicon nitride film of 75 nm thickness 20 . Then, a thin layer of silicon is deposited with a thickness of 100 nm at 1000 °C using dichlorosilane (DCS) or Silane (SiH 4 ) and diborane (B 2 H 6 ) to obtain a heavily doped p-type silicon layer with doping concentration 5 × 10 17 cm −3 21 , 22 . Such a layer is then annealed in vacuum at a temperature of 1000 °C for crystallization as shown in Fig.…”

“…A layer of Si with thickness of 464 nm is next deposited using argon gas and is annealed in vacuum at 1000 °C for 30 min 23 . Additionally, n-thin layer of silicon is deposited with a thickness of 100 nm at 1000 °C using dichlorosilane (DCS), and phosphine (PH 3 ) as N-dopants with doping concentration of 1 × 10 19 cm −3 22 .…”