Near-Memory/In-Memory Computing: Pillars and Ladders

Mohamed, Khaled Salah

doi:10.1007/978-3-030-37224-8_6

Cited by 5 publications

(5 citation statements)

References 17 publications

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“…In addition, STT-MRAM is specifically suited for IMC due to its distinctive features and advantages. These include energy-efficient operation with non-constant refresh cycles, a lack of data corruption concerns in cache comparable to SRAMs [18], minimal read and write latencies, low power consumption compared to PCRAM [19], a compact cell size that allows for denser memory placement near computational units, robust integration capabilities facilitating the co-location of memory and processing units on a single chip, seamless compatibility with CMOS logic for smooth interaction between memory and computation elements, support for parallelism and pipelining, and the capacity to modify individual bits for efficient data storage, manipulation, and processing within IMC scenarios [20], [21], [22].…”

Section: B Suitability Of Stt-mram For Imcmentioning

confidence: 99%

Domain-Specific STT-MRAM-Based In-Memory Computing: A Survey

Yusuf,

Adegbija,

Gajaria

2024

IEEE Access

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In recent years, the rapid growth of big data and the increasing demand for high-performance computing have fueled the development of novel computing architectures. Among these, in-memory computing architectures that leverage the high-density and low-latency nature of modern memory technologies have emerged as promising solutions for domain-specific computing applications. STT-MRAM (Spin Transfer Torque Magnetic Random Access Memory) is one such in-memory computing technology that holds great potential for this field due to its non-volatility, high endurance, and low power consumption. In this survey paper, we aim to provide a comprehensive overview of the state-of-the-art in STT-MRAM-based domainspecific in-memory computing (DS-IMC) architectures. We examine the challenges, opportunities, and trade-offs associated with these architectures from the perspective of various application domains, like machine learning, image and signal processing, and data encryption. We explore different experimental research tools used in studying these architectures, guidelines for efficiently designing them, and gaps in the state-of-the-art that necessitate future research and development.INDEX TERMS domain-specific architectures, in-memory computing, spin-transfer torque RAM.

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Section: B Suitability Of Stt-mram For Imcmentioning

confidence: 99%

Domain-Specific STT-MRAM-Based In-Memory Computing: A Survey

Yusuf,

Adegbija,

Gajaria

2024

IEEE Access

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“…Neuromorphic computing involves the acceleration of traditional computing architectures and the development of low power AI chips useful for edge devices and near-sensor processing (Figure 1 (b)). The acceleration of traditional architectures includes various accelerators, like spike-based processors [43], and in-memory computing architectures [44].…”

Section: Ai Hardwarementioning

confidence: 99%

“…As each neuron has minor variation in size, volume and structure, they respond differently to the same input stimuli yet makes the overall architecture robust for learning new information, providing evidence to the importance of randomness in the intelligent design. Analogous to this, the in-memory computing [44], and analog computing [87] often naturally observe randomness in the artificial neurons, drawing similarities to the biological neurons. The dot-product computation implemented as multiply and accumulate operation with crossbar architecture [47] is a good example of this.…”

Section: B Randomnessmentioning

confidence: 99%

The Why, What and How of Artificial General Intelligence Chip Development

James¹

2020

Preprint

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“…[ 3,4 ] Alternatively, the Harvard architecture surpasses this problem by using a separated memory for storage and processing. [ 3,5 ] However, neither architecture's performance can be compared to the brain. [ 4,6 ] Modern technologies attempt to create elementary devices capable of processing and storing information simultaneously, emulating brain operation.…”

Section: Introductionmentioning

confidence: 99%

“…[ 6,7 ] Unfortunately, the traditional way to engineer novel computational systems is hitting a roadblock mainly because it is not conceivable to upscale a classical CMOS‐based computer to a comparable number of devices as available in the brain. [ 5,6,8 ] This is because the local (on‐chip) and global (system) level energy consumption is prohibitive. In addition, the brain's architecture is not well understood.…”

Section: Introductionmentioning

confidence: 99%

Thermal Management in Neuromorphic Materials, Devices, and Networks

2023

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Machine learning has experienced unprecedented growth in recent years, often referred to as an “artificial intelligence revolution.” Biological systems inspire the fundamental approach for this new computing paradigm: using neural networks to classify large amounts of data into sorting categories. Current machine‐learning schemes implement simulated neurons and synapses on standard computers based on a von Neumann architecture. This approach is inefficient in energy consumption, and thermal management, motivating the search for hardware‐based systems that imitate the brain. Here, the present state of thermal management of neuromorphic computing technology and the challenges and opportunities of the energy‐efficient implementation of neuromorphic devices are considered. The main features of brain‐inspired computing and quantum materials for implementing neuromorphic devices are briefly described, the brain criticality and resistive switching‐based neuromorphic devices are discussed, the energy and electrical considerations for spiking‐based computation are presented, the fundamental features of the brain's thermal regulation are addressed, the physical mechanisms for thermal management and thermoelectric control of materials and neuromorphic devices are analyzed, and challenges and new avenues for implementing energy‐efficient computing are described.

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Near-Memory/In-Memory Computing: Pillars and Ladders

Cited by 5 publications

References 17 publications

Domain-Specific STT-MRAM-Based In-Memory Computing: A Survey

Domain-Specific STT-MRAM-Based In-Memory Computing: A Survey

The Why, What and How of Artificial General Intelligence Chip Development

Thermal Management in Neuromorphic Materials, Devices, and Networks

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