Negative Bias Temperature Instability in Thick Gate Oxides for Power MOS Transistors

Stojadinović, N.; Manić, I.; Danković, Danijel; Djorić-Veljković, S.; Davidović, V.; Prijić, Aneta; Golubović, S.; Prijić, Z.

doi:10.1007/978-1-4614-7909-3_20

Cited by 11 publications

(11 citation statements)

References 74 publications

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“…All curves have the same features and behaviors; I CP increases during the stress phases and slightly increases during the recovery phases. Note that, the same results (increase of I CP due to the generation of interface trap during the recovery phases) have been reported by Stojadinovic et al [8] for a thick gate oxide devices. They have explain this increase by hydrogen-related reacting species required for both passivation and depassivation processes occurring at the SiO 2/Si interface during the stress and after the end of stress in similar manner as in the case of devices exposed to irradiation [9][10][11].…”

Section: Thesupporting

confidence: 86%

NBTI stress on power VDMOS transistors under low magnetic field

Tahanout

Tahi

Boubaaya

et al. 2015

2015 IEEE International Integrated Reliability Workshop (IIRW)

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In this paper, we investigated the magnetic field impact on negative bias temperature instability (NBTI) of commercial power double diffused MOS transistor (VDMOS), using the charge pumping method (CP). We reported that both NBTI induce -interface and-oxide traps are reduced by applying the magnetic field. However, the dynamic of interface trap during the recovery phase is not affected. While, the recovery of oxide trap is accelerated by applied magnetic field.2015 IIRW FINAL REPORT 1

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Section: Thesupporting

confidence: 86%

NBTI stress on power VDMOS transistors under low magnetic field

Tahanout

Tahi

Boubaaya

et al. 2015

2015 IEEE International Integrated Reliability Workshop (IIRW)

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“…NBT stress may lead to degradation of important electrical parameters of power VDMOSFETs. Among these the negative V T caused by increase of N ot and N it is the most serious reliability problem [23]. Note that more significant negative V T is obtained at higher temperatures and/or higher gate voltages, i.e.…”

Section: Development Of Advanced Electronic Industry Is Based On Combmentioning

confidence: 99%

“…NBT stress-induced threshold voltage instabilities in commercial power VDMOSFETs, as well as the implications of related degradation on device lifetime have been extensively investigated in our research in the last decade [27,[42][43][44]. Although in many experiments devices have been subjected to various NBT stress (static or pulsed) and annealing conditions [9,23,25,45,46,[48][49][50][51][52], in this section a part of results obtained during static NBT stress and annealing is presented, with attention to insight into the NBTI as a result of sequential NBT stress and bias annealing steps.…”

Section: Nbt Stress Effectsmentioning

confidence: 99%

“…It should be emphasized that similar to radiation induced degradation, degradation induced by NBT stressing in power VDMOSFETs might be associated with gate oxides as reservoirs of hydrogen related species required for both passivation and depassivation processes occurring at the SiO 2 -Si interface during and after the stress. Accordingly, some elements of the approach applied in standard model of irradiation damage [15,23,55,56] Also, in Fig. 8 it can be observed that the changes of N ot and N it tend to decrease during each new repetition, indicating that non-reversible components of N ot and N it tend to increase.…”

Section: Nbt Stress Effectsmentioning

confidence: 99%

“…Mechanisms responsible for NBT stress induced changes of N ot and N it are bias dependent and thermally activated [9,16,20,23,24,[26][27][28][29]. Interpretations of mechanisms responsible for degradation, very often, include various forms of model based on the assumption that previously passivated defects at SiO 2 -Si interface release hydrogen species which diffuse into the oxide and leave the interface traps [17,19,53,61].…”

Section: Consecutive Radiation and Nbt Stress Effectsmentioning

confidence: 99%

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NBT stress and radiation related degradation and underlying mechanisms in power VDMOSFETs

et al. 2018

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In this paper we provide an overview of instabilities observed in commercial power VDMOSFETs subjected to irradiation, NBT stress, and to consecutive exposure to them. The results have indicated that irradiation of previously NBT stressed devices leads to additional threshold voltage shift, while NBT stress effects in previously irradiated devices depend on the gate bias applied during irradiation and on the total dose received. This points to the importance of the order of applied stresses, indicating that for proper insight into the prediction of device behaviour not only harsh conditions, but also the order of exposure have to be considered. It has also been shown that changes in the densities of oxide trapped charge and interface traps during spontaneous recovery after each of applied stresses can be significant, thus leading to additional instability, even though the threshold voltage seems to remain stable, pointing to the need for clarifying the responsible mechanisms.

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Analysis of recoverable and permanent components of threshold voltage shift in NBT stressed p-channel power VDMOSFET

Danković¹,

Stojadinović²,

Prijić³

et al. 2015

Chinese Phys. B

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In this study we investigate the dynamic recovery effects in IRF9520 commercial p-channel power vertical double diffused metal–oxide semiconductor field-effect transistors (VDMOSFETs) subjected to negative bias temperature (NBT) stressing under the particular pulsed bias. Particular values of the pulsed stress voltage frequency and duty cycle are chosen in order to analyze the recoverable and permanent components of stress-induced threshold voltage shift in detail. The results are discussed in terms of the mechanisms responsible for buildup of oxide charge and interface traps. The partial recovery during the low level of pulsed gate voltage is ascribed to the removal of recoverable component of degradation, i.e., to passivation/neutralization of shallow oxide traps that are not transformed into the deeper traps (permanent component). Considering the value of characteristic time constant associated with complete removal of the recoverable component of degradation, it is shown that by selecting an appropriate combination of the frequency and duty cycle, the threshold voltage shifts induced under the pulsed negative bias temperature stress conditions can be significantly reduced, which may be utilized for improving the device lifetime in real application circuits.

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Negative Bias Temperature Instability in Thick Gate Oxides for Power MOS Transistors

Cited by 11 publications

References 74 publications

NBTI stress on power VDMOS transistors under low magnetic field

NBTI stress on power VDMOS transistors under low magnetic field

NBT stress and radiation related degradation and underlying mechanisms in power VDMOSFETs

Analysis of recoverable and permanent components of threshold voltage shift in NBT stressed p-channel power VDMOSFET

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