Negative Capacitance Field Effect Transistors based on Van der Waals 2D Materials

Abstract

Steep subthreshold swing (SS) is a decisive index for low energy consumption devices. However, the SS of conventional field effect transistors (FETs) has suffered from Boltzmann Tyranny, which limits the scaling of SS to sub‐60 mV dec−1 at room temperature. Ferroelectric gate stack with negative capacitance (NC) is proved to reduce the SS effectively by the amplification of the gate voltage. With the application of 2D ferroelectric materials, the NC FETs can be further improved in performance and downscaled to a smaller dimension as well. This review introduces some related concepts for in‐depth understanding of NC FETs, including the NC, internal gate voltage, SS, negative drain‐induced barrier lowering, negative differential resistance, single‐domain state, and multi‐domain state. Meanwhile, this work summarizes the recent advances of the 2D NC FETs. Moreover, the electrical characteristics of some high‐performance NC FETs are expressed as well. The factors which affect the performance of the 2D NC FETs are also presented in this paper. Finally, this work gives a brief summary and outlook for the 2D NC FETs.

Two-dimensional materials for future information technology: status and prospects

“…Additionally, the insertion of a BN dielectric layer forms a good vdW contact, resulting in lower gate leakage and steeper SS, as well as a smaller hysteresis window. To attain high-performance 2D ferroelectric gate stacks for 2D NCFETs, factors such as the physical parameters of ferroelectric materials, capacitance matching between ferroelectric layers and semiconductors, and hysteresis effects need consideration during fabrication and operation [554].…”