Negative differential conductivity in Gate-All-Around Si Nanowire FETs and its impact on Circuit Performance

Abstract

A fully-coupled continuum based 3-D numerical analysis is performed to understand the device-circuit co-optimization issues due to device self-heating and carrier heating effects in Si Gate All-Around (GAA) Nanowire Field Effect Transistors (NWFETs). Employing coupled 3-moment based Energy Transport (ET) formulations and Quantum Confinement (QC) effect; we report the evidence of Negative Differential Conductivity (NDC) in NWFETs and its effect on signal propagation delay in NWFET based CMOS inverter and 3-stage Ring Oscillator (RO) circuits.