Neural Coding in Spiking Neural Networks: A Comparative Study for Robust Neuromorphic Systems

Guo, Wenzhe; Fouda, Mohammed E.; Eltawil, Ahmed M.; Salama, Khaled N.

doi:10.3389/fnins.2021.638474

Cited by 165 publications

(88 citation statements)

References 60 publications

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“…Instead, the activation strength is encoded by the timing and/or the amount of the spikes. A lot of effort has been put into researching neural encoding schemes (called neural code) since they are one of the major determinants of an SNNs performance [8], [14], [16], [27], [28]. Rate coding is the most used encoding scheme.…”

Section: B Information Encoding With Binary Spikesmentioning

confidence: 99%

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Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks

Sommer¹,

Özkan²,

Keszöcze³

et al. 2022

Preprint

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Spiking Neural Networks (SNNs) compute in an event-based matter to achieve a more efficient computation than standard Neural Networks. In SNNs, neuronal outputs (i.e. activations) are not encoded with real-valued activations but with sequences of binary spikes. The motivation of using SNNs over conventional neural networks is rooted in the special computational aspects of spike based processing, especially the very high degree of sparsity of neural output activations. Well established architectures for conventional Convolutional Neural Networks (CNNs) feature large spatial arrays of Processing Elements (PEs) that remain highly underutilized in the face of activation sparsity. We propose a novel architecture that is optimized for the processing of Convolutional SNNs (CSNNs) that feature a high degree of activation sparsity. In our architecture, the main strategy is to use less but highly utilized PEs. The PE array used to perform the convolution is only as large as the kernel size, allowing all PEs to be active as long as there are spikes to process. This constant flow of spikes is ensured by compressing the feature maps (i.e. the activations) into queues that can then be processed spike by spike. This compression is performed in runtime using dedicated circuitry, leading to a self-timed scheduling. This allows the processing time to scale directly with the number of spikes. A novel memory organization scheme called memory interlacing is used to efficiently store and retrieve the membrane potentials of the individual neurons using multiple small parallel on-chip RAMs. Each RAM is hardwired to its PE, reducing switching circuitry and allowing RAMs to be located in close proximity to the respective PE. We implemented the proposed architecture on an FPGA and achieved a significant speedup compared to other implementations while needing less hardware resources and maintaining a lower energy consumption.

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Section: B Information Encoding With Binary Spikesmentioning

confidence: 99%

“…• The neural code determines how information is encoded with binary spikes. The length of the encoding window and the number of spikes required to encode neuronal activations are the most important determinants of the SNN's inference speed and efficiency [15], [16]. In general, the higher the spike sparsity, the better.…”

Section: Introductionmentioning

confidence: 99%

Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks

Sommer¹,

Özkan²,

Keszöcze³

et al. 2022

Preprint

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“…Tailoring the encoding hyper-parameters to reconstruct the background signal defeats the purpose of event-based sensing. While some studies [28,29] evaluate the SNN performance to optimize the encoding hyperparameters, the performance is effected by the SNN topology and learning algorithm.…”

Section: Encodingmentioning

confidence: 99%

Signals to Spikes for Neuromorphic Regulated Reservoir Computing and EMG Hand Gesture Recognition

Garg,

Balafrej,

Beilliard

et al. 2021

Preprint

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Surface electromyogram (sEMG) signals result from muscle movement and hence they are an ideal candidate for benchmarking event-driven sensing and computing. We propose a simple yet novel approach for optimizing the spike encoding algorithm's hyperparameters inspired by the readout layer concept in reservoir computing. Using a simple machine learning algorithm after spike encoding, we report performance higher than the state-of-the-art spiking neural networks on two open-source datasets for hand gesture recognition. The spike encoded data is processed through a spiking reservoir with a biologically inspired topology and neuron model. When trained with the unsupervised activity regulation CRITICAL algorithm to operate at the edge of chaos, the reservoir yields better performance than state-of-the-art convolutional neural networks. The reservoir performance with regulated activity was found to be 89.72% for the Roshambo EMG dataset and 70.6% for the EMG subset of sensor fusion dataset. Therefore, the biologicallyinspired computing paradigm, which is known for being power efficient, also proves to have a great potential when compared with conventional AI algorithms. CCS CONCEPTS• Computing methodologies → Bio-inspired approaches.

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“…SNN accepts sensory input and encodes the information in spike trains. It is crucial to understand spike train information flow 11–13 . The two widely encoding techniques used in SNN can be classified as (i) rate encoding and (ii) temporal encoding 14 .…”

Section: Introductionmentioning

confidence: 99%

“…TFS coding involves mapping input data into a single spike where the information is contained in the time taken to first spike. Hardware implementation of temporal encoding has focused only on the TFS approach in the past 12,15 due to its simplicity of circuit implementation. However, it can only represent single‐dimensional information 14 .…”

Section: Introductionmentioning

confidence: 99%

Reliability‐aware design of temporal neuromorphic encoder for image recognition

Shaik

Singhal

et al. 2021

Circuit Theory & Apps

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Very large scale integration (VLSI)-based neuromorphic systems have been evolving quickly in recent years. These systems have been used in complex cognitive tasks such as image classification and pattern recognition. A neuromorphic encoder is an essential component in a neuromorphic system, which converts sensory data into spike trains. The advancement in CMOS technology nodes leads to various reliability issues. Bias temperature instability (BTI) and hot carrier injection (HCI) are major reliability issues in analog/ mixed VLSI circuits. This paper implements a temporal neuromorphic encoder, and a corresponding mathematical model is derived for image processing applications. The relationship between an input image pixel value and output of the encoder, that is, interspike interval (ISI), is found to be exponential. The impact of BTI and HCI on the temporal neuromorphic encoder is analyzed. The degradation analysis revealed a loss of encoding functionality for which three mitigation techniques are discussed. Finally, a reliability-aware neuromorphic encoder is proposed to minimize the effect of degradation over its lifetime. The power consumption of conventional and proposed reliabilityaware neuromorphic encoders is also presented.

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Neural Coding in Spiking Neural Networks: A Comparative Study for Robust Neuromorphic Systems

Cited by 165 publications

References 60 publications

Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks

Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks

Signals to Spikes for Neuromorphic Regulated Reservoir Computing and EMG Hand Gesture Recognition

Reliability‐aware design of temporal neuromorphic encoder for image recognition

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