Neural recording system with low-noise analog front-end and comparator-based cyclic ADC

Abstract

This paper describes a low-noise neural recording integrated circuit composed of a lownoise analog front-end (AFE) and a low-power analog-to-digital converter (ADC). The AFE amplifies biopotentials and the ADC converts input signal to digital output. The AFE exhibits 53.4dB of mid-band gain, 38.8Hz-10.6kHz of -3dB bandwidth. Total input referred noise (IRN) of AFE is 10.8μVrms and noise efficiency factor (NEF) is 8.1. The ADC achieves 10bit resolution and operates at 2.5MS/s. The chip is fabricated and successfully tested in a 0.18μm CMOS process.

An 8-bit 500kS/s semi-digital cyclic ADC with time-mode residue voltage generation

“…The final digital output shows D out = 00110011, which corresponds to 0.2V for full scale input range of 1V. [2] and [3], and comparable to [1]. This is due to the low power operation owing to the reduced supply voltage and on/off control of the current sources.…”

“…Along with the successive approximation (SAR) ADCs, cyclic ADCs that generate the output bit for each operation cycle are widely used for sensor readout blocks for portable bio-medical devices [1][2][3]. Cyclic ADCs are compact, and can operate with low power which is suitable for low speed and medium to high resolution data acquisition applications.…”

A 4×32-Channel Neural Recording System for Deep Brain Stimulation Systems

“…Moreover, background noise at the recording site is typically in the range of 5 mV rms to 10 mV rms [22]. Therefore, an analog front-end (AFE) of a neural recording system needs to have an input-referred noise (IRN) of no more than a few mV rms [17,19,23]. In addition, a neural recording system cannot use much power, because heat dissipation must be restricted to avoid necrosis in cellular tissue.…”