Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital–Analog Networks

Kim, Sangyeob; Kim, Sangjin; Um, Soyeon; Kim, Soyeon; Kim, Kwantae; Yoo, Hoi-Jun

doi:10.1109/jssc.2023.3273238

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Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital–Analog Networks

Cited by 9 publications

References 12 publications

Design and implementation of a charge-sharing in-memory-computing macro with sparse feature for quantized neural network

Design and implementation of a charge-sharing in-memory-computing macro with sparse feature for quantized neural network

A 19.7 TFLOPS/W Multiply-less Logarithmic Floating-Point CIM Architecture with Error-Reduced Compensated Approximate Adder

Tempo-CIM: A RRAM Compute-in-Memory Neuromorphic Accelerator With Area-Efficient LIF Neuron and Split-Train-Merged-Inference Algorithm for Edge AI Applications

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