Promoted model architectures or algorithms are crucial for intelligent
manufacturing since developing them takes a lot of trial and error
to embed the domain knowledge into the models correctly. Especially
in semiconductor manufacturing, the whole processes depend on complicated
physical equations and sophisticated fine-tuning. Therefore, we use
a neuroevolution-based model to search the optimized architecture
automatically. The collector current value at a particular bias of
the silicon–germanium (SiGe) heterojunction bipolar transistor,
generated by technology computer-aided design (TCAD), is used as the
target dataset with six process parameters as the inputs. The processes
include oxidation, dry and wet etching, implantation, annealing, diffusion,
and chemical–mechanical polishing. Our work can build a suitable
model network with a fast turnaround time, and practical physical
constraints are fused in it without domain knowledge extraction. Take
the case with 3840 data and one output as an instance. The mean square
errors of the train set and validation set, as well as the mean absolute
percentage error of the test set, are 1.317 × 10–6, 7.215 × 10–7, and 0.216 while using multilayer
perceptron (MLP) and they are 3.285 × 10–7,
1.661 × 10–7, and 0.097 while using NE. The
consequences show that the work in this vein is promising. According
to the trend plot and results, the ability to extract physic is much
better than the traditional (MLP) model.