Neuromorphic 3D Integrated Circuit

Ehsan, Amimul; Zhou, Zhen; Yi, Yang

doi:10.1145/3060403.3060470

Cited by 9 publications

(4 citation statements)

References 21 publications

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“…Belhadj et al [109] integrated a CMOS vision sensor into a neuromorphic accelerator using 130 nm technology. Their sensor was composed of microblock that issues spikes to the neurons using temporal coding [110]. The spikes are passed to the first layer through synaptic weights.…”

Section: ×mentioning

confidence: 99%

An Electromagnetic Perspective of Artificial Intelligence Neuromorphic Chips

Li,

Ma,

Ahmed

et al. 2023

Electromag. Sci.

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The emergence of artificial intelligence has represented great potential in solving a wide range of complex problems. However, traditional general-purpose chips based on von Neumann architectures face the "memory wall" problem when applied in artificial intelligence applications. Based on the efficiency of the human brain, many intelligent neuromorphic chips have been proposed to emulate its working mechanism and neuron-synapse structure. With the emergence of spiking-based neuromorphic chips, the computation and energy efficiency of such devices could be enhanced by integrating a variety of features inspired by the biological brain. Aligning with the rapid development of neuromorphic chips, it is of great importance to quickly initiate the investigation of the electromagnetic interference and signal integrity issues related to neuromorphic chips for both CMOS-based and memristor-based artificial intelligence integrated circuits. Here, this paper provides a review of neuromorphic circuit design and algorithms in terms of electromagnetic issues and opportunities with a focus on signal integrity issues, modeling, and optimization. Moreover, the heterogeneous structures of neuromorphic circuits and other circuits, such as memory arrays and sensors using different integration technologies, are also reviewed, and locations where signal integrity might be compromised are discussed. Finally, we provide future trends in electromagnetic interference and signal integrity and outline prospects for upcoming neuromorphic devices.

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Section: ×mentioning

confidence: 99%

An Electromagnetic Perspective of Artificial Intelligence Neuromorphic Chips

Li,

Ma,

Ahmed

et al. 2023

Electromag. Sci.

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“…It enables interconnecting circuits on more than a single plan, with vertical wiring of the plans. Many works have already consider leveraging 3D technology to improve neuromorphic computing efficiency by implementing one layer by 3D plan [13,33], or by separating the memory and logic part on different tiers [33,89], or by maximizing parallel processing of analog/mixed signal designs with the use of crossbar arrays on the second plan [41]. Chang et al [33] show that, in monolithic 3D, implementation of digital neuromorphic chip for formal processing is more performant if memory and logic are both distributed on several chips, which allows saving around 20% power with respect to the same 2D implementation.…”

Section: Hardware Implementationsmentioning

confidence: 99%

“…Based on this, Amir et al [6] are already envisioning sensors with integrated DNN computations at low footprint. Also, some groups [41,84] have proposed to exploit the Through Silicon Via technology process constraints on the density of interconnects to design analog neuron models with reduced capacitance footprint. Therefore, we see works dealing with formal ANN processors whose throughput and power consumption are increased and decreased respectively, or works studying the benefits of 3D for a parallel event-driven architecture.…”

Section: Hardware Implementationsmentioning

confidence: 99%

Spiking Neural Networks Hardware Implementations and Challenges

Bouvier

Valentian

Mesquida

et al. 2019

J. Emerg. Technol. Comput. Syst.

201

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Neuromorphic computing is henceforth a major research field for both academic and industrial actors. As opposed to Von Neumann machines, brain-inspired processors aim at bringing closer the memory and the computational elements to efficiently evaluate machine-learning algorithms. Recently, Spiking Neural Networks, a generation of cognitive algorithms employing computational primitives mimicking neuron and synapse operational principles, have become an important part of deep learning. They are expected to improve the computational performance and efficiency of neural networks, but are best suited for hardware able to support their temporal dynamics. In this survey, we present the state of the art of hardware implementations of spiking neural networks and the current trends in algorithm elaboration from model selection to training mechanisms. The scope of existing solutions is extensive; we thus present the general framework and study on a case-by-case basis the relevant particularities. We describe the strategies employed to leverage the characteristics of these event-driven algorithms at the hardware level and discuss their related advantages and challenges.

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“…Unlike the high-speed modern computer, the main frequency of the spiking signals in the nervous system is as low as ~kilohertz level (1-10 millisecond duration) with millivolt-level magnitudes (Kandel et al, 2000). The neuromorphic system is a software and hardware co-design approach to achieving a comparable power-efficient artificial intelligence system by taking inspiration from human brains and implementing low-fire-rate spiking communication, threshold activation functions, and spiking neural networks (Mead, 1990;Schemmel et al, 2008;Azevedo et al, 2009;Gerstner and Naud, 2009;De Garis et al, 2010;Goertzel et al, 2010;Smith, 2010;Versace and Chandler, 2010;Brüderle et al, 2011;Merolla et al, 2011;Seo et al, 2011;Joubert et al, 2012;Pfeil et al, 2012;Esser et al, 2013;Furber et al, 2013;Hasler and Marr, 2013;Painkras et al, 2013;Rajendran et al, 2013;Stromatias et al, 2013;Benjamin et al, 2014;Chen et al, 2014;Merolla et al, 2014;Putnam et al, 2014;Indiveri et al, 2015;Qiao et al, 2015;Schuman et al, 2015;Walter et al, 2015;Schuman, 2016;Ehsan et al, 2017;Ferreira de Lima et al, 2017;Lastras-Montaño et al, 2017;Osswald et al, 2017;Schuman et al, 2017;Bai and Bradley, 2018;Davies et al, 2018;An et al, 2018a,b;…”

Section: Introduction To Neuromorphic Computingmentioning

confidence: 99%

Monitoring time domain characteristics of Parkinson’s disease using 3D memristive neuromorphic system

Siddique,

Zhang,

2023

Front. Comput. Neurosci.

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IntroductionParkinson’s disease (PD) is a neurodegenerative disorder affecting millions of patients. Closed-Loop Deep Brain Stimulation (CL-DBS) is a therapy that can alleviate the symptoms of PD. The CL-DBS system consists of an electrode sending electrical stimulation signals to a specific region of the brain and a battery-powered stimulator implanted in the chest. The electrical stimuli in CL-DBS systems need to be adjusted in real-time in accordance with the state of PD symptoms. Therefore, fast and precise monitoring of PD symptoms is a critical function for CL-DBS systems. However, the current CL-DBS techniques suffer from high computational demands for real-time PD symptom monitoring, which are not feasible for implanted and wearable medical devices.MethodsIn this paper, we present an energy-efficient neuromorphic PD symptom detector using memristive three-dimensional integrated circuits (3D-ICs). The excessive oscillation at beta frequencies (13–35 Hz) at the subthalamic nucleus (STN) is used as a biomarker of PD symptoms.ResultsSimulation results demonstrate that our neuromorphic PD detector, implemented with an 8-layer spiking Long Short-Term Memory (S-LSTM), excels in recognizing PD symptoms, achieving a training accuracy of 99.74% and a validation accuracy of 99.52% for a 75%–25% data split. Furthermore, we evaluated the improvement of our neuromorphic CL-DBS detector using NeuroSIM. The chip area, latency, energy, and power consumption of our CL-DBS detector were reduced by 47.4%, 66.63%, 65.6%, and 67.5%, respectively, for monolithic 3D-ICs. Similarly, for heterogeneous 3D-ICs, employing memristive synapses to replace traditional Static Random Access Memory (SRAM) resulted in reductions of 44.8%, 64.75%, 65.28%, and 67.7% in chip area, latency, and power usage.DiscussionThis study introduces a novel approach for PD symptom evaluation by directly utilizing spiking signals from neural activities in the time domain. This method significantly reduces the time and energy required for signal conversion compared to traditional frequency domain approaches. The study pioneers the use of neuromorphic computing and memristors in designing CL-DBS systems, surpassing SRAM-based designs in chip design area, latency, and energy efficiency. Lastly, the proposed neuromorphic PD detector demonstrates high resilience to timing variations in brain neural signals, as confirmed by robustness analysis.

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Neuromorphic 3D Integrated Circuit

Cited by 9 publications

References 21 publications

An Electromagnetic Perspective of Artificial Intelligence Neuromorphic Chips

An Electromagnetic Perspective of Artificial Intelligence Neuromorphic Chips

Spiking Neural Networks Hardware Implementations and Challenges

Monitoring time domain characteristics of Parkinson’s disease using 3D memristive neuromorphic system

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