Neuron Fault Tolerance in Spiking Neural Networks

Spyrou, Theofilos; El-Sayed, Sarah A.; Afacan, Engín; Camuñas-Mesa, Luis A.; Linares-Barranco, B.; Stratigopoulos, Haralampos-G.

doi:10.23919/date51398.2021.9474081

Cited by 34 publications

(35 citation statements)

References 20 publications

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“…Theoretically, high fault tolerance to noisy data and low power consumption during computations are both essential factors for real-time information processing on neuromorphic chips [51], [65]. Our analysis revealed that SNNs trained by the synergistic learning approach exhibit strong robustness to various types of noise.…”

Section: Joint Decision Framework For Snnsmentioning

confidence: 88%

A Synapse-Threshold Synergistic Learning Approach for Spiking Neural Networks

Sun¹,

Cai²,

Yang³

et al. 2022

Preprint

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Spiking neural networks (SNNs) have demonstrated excellent capabilities in various intelligent scenarios. Most existing methods for training SNNs are based on the concept of synaptic plasticity; however, learning in the realistic brain also utilizes intrinsic non-synaptic mechanisms of neurons. The spike threshold of biological neurons is a critical intrinsic neuronal feature that exhibits rich dynamics on a millisecond timescale and has been proposed as an underlying mechanism that facilitates neural information processing. In this study, we develop a novel synergistic learning approach that simultaneously trains synaptic weights and spike thresholds in SNNs. SNNs trained with synapse-threshold synergistic learning (STL-SNNs) achieve significantly higher accuracies on various static and neuromorphic datasets than SNNs trained with two singlelearning models of the synaptic learning (SL) and the threshold learning (TL). During training, the synergistic learning approach optimizes neural thresholds, providing the network with stable signal transmission via appropriate firing rates. Further analysis indicates that STL-SNNs are robust to noisy data and exhibit low energy consumption for deep network structures. Additionally, the performance of STL-SNN can be further improved by introducing a generalized joint decision framework (JDF). Overall, our findings indicate that biologically plausible synergies between synaptic and intrinsic non-synaptic mechanisms may provide a promising approach for developing highly efficient SNN learning methods.

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Section: Joint Decision Framework For Snnsmentioning

confidence: 88%

A Synapse-Threshold Synergistic Learning Approach for Spiking Neural Networks

Sun¹,

Cai²,

Yang³

et al. 2022

Preprint

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show abstract

“…Symptom detectors that detect some anomaly in intermediate nodes, i.e., high neuron activation, are proposed in [11], [21]- [23]. Selective Triple Modular Redundancy (TMR) applied to the most critical neural network layers is proposed in [22], [24], [25]. Algorithmic-based error detection and correction methods using checksum arithmetic are discussed in [13], [26]- [29].…”

Section: Prior Art On Testing Ai Hardware Acceleratorsmentioning

confidence: 99%

Compact Functional Testing for Neuromorphic Computing Circuits

El-Sayed

Spyrou

Camuñas-Mesa

et al. 2023

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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We address the problem of testing Artificial Intelligence (AI) hardware accelerators implementing Spiking Neural Networks (SNNs). We define a metric to quickly rank available samples for training and testing based on their fault detection capability. The metric measures the inter-class spike count difference of a sample for the fault-free design. In particular, each sample is assigned a score equal to the spike count difference between the first two top classes. The hypothesis is that samples with small scores achieve high fault coverage because they are prone to misclassification, i.e., a small perturbation in the network due to a fault will result in these samples being misclassififed with high probability. We show that the proposed metric correlates with the per-sample fault coverage and that retaining a set of high-ranked samples in the order of ten achieves near perfect fault coverage for critical faults that affect the SNN accuracy. The proposed test generation approach is demonstrated on two SNNs modelled in Python and on actual neuromorphic hardware. We discuss fault modeling and perform an analysis to reduce the fault space so as to speed up test generation time.

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“…Every node carries an identification corresponding to its x and y address in the mesh, and its color indicates the respective layer in the network. Nodes (5,4) and (6,4) are extra nodes added for routing purposes but do not perform any processing.…”

Section: The Convolutional Snnmentioning

confidence: 99%

“…It is frequently cited that SNN hardware accelerators inherit the remarkable fault-tolerance capabilities of the biological brain, offering resilience to hardware-level faults induced by manufacturing defects, reduced-voltage memory operations, radiation, and aging. However, this assumption has been proven false according to recent fault injection experiments [6]- [9].…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Reliability Analysis of a Spiking Neural Network Hardware Accelerator

Spyrou¹,

El-Sayed²,

Afacan³

et al. 2022

2022 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

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Despite the parallelism and sparsity in neural network models, their transfer into hardware unavoidably makes them susceptible to hardware-level faults. Hardware-level faults can occur either during manufacturing, such as physical defects and process-induced variations, or in the field due to environmental factors and aging. The performance under fault scenarios needs to be assessed so as to develop cost-effective fault-tolerance schemes. In this work, we assess the resilience characteristics of a hardware accelerator for Spiking Neural Networks (SNNs) designed in VHDL and implemented on an FPGA. The fault injection experiments pinpoint the parts of the design that need to be protected against faults, as well as the parts that are inherently fault-tolerant.

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Neuron Fault Tolerance in Spiking Neural Networks

Cited by 34 publications

References 20 publications

A Synapse-Threshold Synergistic Learning Approach for Spiking Neural Networks

A Synapse-Threshold Synergistic Learning Approach for Spiking Neural Networks

Compact Functional Testing for Neuromorphic Computing Circuits

Reliability Analysis of a Spiking Neural Network Hardware Accelerator

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