New algorithms for hardware-efficient implementation of sign detection and magnitude comparison in residue number systems

Abstract

Residue Number System (RNS), being a non-positional number system, is emerging as a promising data representation to substitute the accustomed two's complement number system for low-power and high-speed digital signal processing. Due to its carry free property at subword level, arithmetic operations such as addition, subtraction and multiplication can be performed at higher speed than any weighted number system. Nonetheless, the arithmetic operations such as sign detection, signed integer magnitude comparison are found to be more difficult to implement in RNS. This thesis aims to develop new algorithms for hardwareefficient implementation of these difficult operations in RNS. Specifically, the following new findings and results are reported in this thesis.