New Architectural Design of CA-Based Codec

Bhaumik, Jaydeb; Chowdhury, Debashish

doi:10.1109/tvlsi.2009.2020396

Cited by 8 publications

(4 citation statements)

References 10 publications

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“…Several error detecting and correcting codes are already available. Many adjacent error correcting codes [3], [4], [5] and CA-based error detecting and correcting codes [6], [7], [8] have already been introduced to detect and correct adjacent errors in communication and storage systems. Alternatively, Bose-Chaudhuri-Hocquenghem (BCH) code [9] and Reed Solomon (RS) code [10], [11] can protect MBUs.…”

Section: Introductionmentioning

confidence: 99%

Design of SEC-DED and SEC-DED-DAEC Codes of different lengths

Tripathi¹,

Jana²,

Bhaumik³

2020

Preprint

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Reliability is an important requirement for both communication and storage systems. Due to continuous scale down of technology multiple adjacent bits error probability increases. The data may be corrupted due soft errors. Error correction codes are used to detect and correct the errors. In this paper, design of single error correction-double error detection (SEC-DED) and single error correction-double error detectiondouble adjacent error correction (SEC-DED-DAEC) codes of different data lengths have been proposed. Proposed SEC-DED and SEC-DED-DAEC codes require lower delay and power compared to existing coding schemes. Area complexity in terms of logic gates of proposed and existing codes have been presented. ASIC-based synthesis results show a notable reduction compared to existing SEC-DED codes. All the codec architectures are synthesized on ASIC platform. Performances of different SEC-DED-DAEC codes are tabulated in terms of area, power and delay.

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Section: Introductionmentioning

confidence: 99%

Design of SEC-DED and SEC-DED-DAEC Codes of different lengths

Tripathi¹,

Jana²,

Bhaumik³

2020

Preprint

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“…Only one rule vector for each n-length CA has been provided in [3]. A new architectural design of CA-based codec based on linear maximum length CA has been proposed in [5]. In [2] authors proposed an algorithm for determining minimal cost n-cell maximum length CA of degree up to 500.…”

Section: Introductionmentioning

confidence: 99%

Synthesis of all Maximum Length Cellular Automata of Cell Size up to 12

Bhaumik

2015

Preprint

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Maximum length CA has wide range of applications in design of linear block code, cryptographic primitives and VLSI testing particularly in Built-In-Self-Test. In this paper, an algorithm to compute all n-cell maximum length CA-rule vectors is proposed. Also rule vectors for each primitive polynomial in GF (2 2 ) to GF (2 12 ) have been computed by simulation and they have been listed.Programmable rule vectors based maximum length CA can be used to design cryptographic primitives.

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“…Although these codes are much more complex than standard DEC codes, they could be very useful when transmitting both real-time and non-real-time data. The same goes for RS codes, as well as for all other codes that can correct double (spotty) byte errors [14]- [16].…”

mentioning

confidence: 96%

“…The reason is that these codes use finite field (FF) arithmetic, which is not supported by modern processors. Hence, to achieve high throughputs, the codes from [6]- [16] must be implemented in dedicated hardware (e.g. the software-based DEC-BCH decoders need several tens of clock cycles to process one bit [17], [18]).…”

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confidence: 99%

Integer Codes Correcting Single Errors within Two Bytes

Radonjić

2021

J CIRCUIT SYST COMP

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This paper presents a class of integer codes suitable for use in optical networks with low error rates. The presented codes are constructed with the help of a computer and have two important features: first, they can correct single errors affecting one or two [Formula: see text]-bit bytes, and second, they use processor-friendly operations to encode/decode data bits. The effectiveness of the presented codes is demonstrated on theoretical models of four-core and six-core processors. The obtained results show that the decoder throughput reaches 14.70[Formula: see text]Gbps, which is above the operating speed of 10G networks. Finally, the paper compares the proposed codes with BCH codes of similar properties. The comparison is made in terms of redundancy and the number of decoding operations.

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New Architectural Design of CA-Based Codec

Cited by 8 publications

References 10 publications

Design of SEC-DED and SEC-DED-DAEC Codes of different lengths

Design of SEC-DED and SEC-DED-DAEC Codes of different lengths

Synthesis of all Maximum Length Cellular Automata of Cell Size up to 12

Integer Codes Correcting Single Errors within Two Bytes

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