New Boundary Condition for Decoupling Capacitance Selection in SiC Phase Legs Considering Short-Circuit Events

Timms, Craig; Qiao, Liang; Wang, Fred; Zhang, Zheyu; Dong, Dong

doi:10.1109/ecce.2018.8558003

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“…Defining a value of Cdec that ensures that the voltage overshoot generated by this mix of stray inductances is limited to a maximum value is the objective of this paper. Other design criteria as the behavior under short circuit conditions can be used [6], but this paper is focused on the impact of switching speed and stray elements on the overvoltage as a function of the decoupling capacitor.…”

Section: Introductionmentioning

confidence: 99%

Determining the Minimal Decoupling Capacitor in a Railway Traction Inverter Using Optimization

Medrado¹,

Guichon²,

Jeannin³

et al. 2021

IEEE Trans. on Ind. Applicat.

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This paper aims determining the minimum decoupling capacitor Cdec for a railway traction inverter. It is defined when any increase of its value does not decrease the overvoltage at turn off anymore. A simple generic model is deduced from a full understanding of the switching cell behavior, including the effect of all stray inductances and all interactions within the switching cell. This model is used in an optimization process in order to obtain directly the minimal value of Cdec. The methodology is validated in comparison with time simulation, as well as using experimental results. It has been used to analyze the impact of the switching cell parameters on the minimum value of Cdec: switching speed, stray inductances and additional resistance have been considered.

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Section: Introductionmentioning

confidence: 99%