New Compact CMOS Continuous-Time Low-Voltage Analog Rank-Order Filter Architecture

Ramírez-Angulo, J.; Carvajal, R.G.; Ducoudray, G.O.; Lopez-Martin, A.J.; Torralba, A.

doi:10.1109/tcsii.2004.827553

Cited by 12 publications

(6 citation statements)

References 8 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…It is worth mentioning that the delay parameter is measured by applying pulses to the inputs as described in [36] and the power consumption is the average power dissipated when a sinusoidal wave together with a triangular wave are fed to the inputs of the circuit. Furthermore, the error is calculated according to [38]. According to the simulation results the proposed design has significantly high performance, low power consumption, high dynamic range and high precision at both CMOS and CNFET technologies.…”

Section: Simulation Results Analyses and Comparisonsmentioning

confidence: 99%

High-Performance Mixed-Mode Universal Min-Max Circuits for Nanotechnology

Moaiyeri

Chavoshisani

Jalali

et al. 2011

Circuits Syst Signal Process

View full text Add to dashboard Cite

In this paper a low-power, high-speed and high-resolution voltage-mode Min-Max circuit, as well as a new efficient universal structure for determining the minimum and maximum values of the input digital signals, is proposed for nanotechnology. In addition, the proposed designs provide rail-to-rail input and output signals which enhance the performance and the robustness of the circuits. The advantage of the proposed Min-Max circuit is that it is extendable for any arbitrary n-digit and radix-r input numbers. Comprehensive simulation results at CMOS and CNFET technologies demonstrate the low-power and high-performance operation as well as insusceptibility to PVT variations of the proposed structure.

show abstract

Section: Simulation Results Analyses and Comparisonsmentioning

confidence: 99%

High-Performance Mixed-Mode Universal Min-Max Circuits for Nanotechnology

Moaiyeri

Chavoshisani

Jalali

et al. 2011

Circuits Syst Signal Process

View full text Add to dashboard Cite

show abstract

“…1 has a limited resolution in distinguishing values of the input signals V i1 …V i9 . This feature is called corner error [9,12], and is the main cause of erroneous calculation of the median value at the filter output. A unique feature of the proposed circuit solution (Fig.…”

Section: Corner Errorsmentioning

confidence: 99%

“…For this reason, the median filtering greatly facilitates further image processing such as the edge detection or the segmentation. In integrated circuits, the median filters are implemented using both analog [2][3][4][5][6][7][8][9][10][11][12][13][14][15][16] and digital [17][18][19][20] techniques, depending on the design requirements. Typically, the greatest reduction of consumed power and required chip area are achievable using analog median filters, because they do not require analog to digital converters (ADC) for conversion of video signals generated by photo sensors.…”

Section: Introductionmentioning

confidence: 99%

A nine-input 1.25 mW, 34 ns CMOS analog median filter for image processing in real time

Jendernalik

Blakiewicz

Jakusz

et al. 2013

Analog Integr Circ Sig Process

View full text Add to dashboard Cite

In this paper an analog voltage-mode median filter, which operates on a 3 9 3 kernel is presented. The filter is implemented in a 0.35 lm CMOS technology. The proposed solution is based on voltage comparators and a bubble sort configuration. As a result, a fast (34 ns) time response with low power consumption (1.25 mW for 3.3 V) is achieved. The key advantage of the configuration is relatively high accuracy of signal processing, which allows the calculation of the median of signals with the difference in amplitude as small as 10 mV. This feature allows the application of the filter to vision systems with up to 7 bit equivalent resolution. The analytical and statistical analysis of the filter resolution, and analysis of its speed limitations are presented and compared to measurement results. Based on the achieved results, a set of guidelines for the filter design and optimisation is presented.

show abstract

“…5. This OTA was reported in [8,9]. The OTA consists of a cascade of two differential amplifiers with alternate polarity.…”

Section: Introductionmentioning

confidence: 99%

Versatile multi-decade CMOS voltage-controlled oscillator with accurate amplitude and pulse width control

Garimella

Kalyani-Garimella

Romero

et al. 2008

Analog Integr Circ Sig Process

View full text Add to dashboard Cite

A compact, versatile and very high speed approach for waveform generation is introduced. It generates triangle and square waveforms. The VCO has a very wide range of oscillating frequencies, from fractions of Hz to 30 MHz in 0.5 lm CMOS technology. The amplitude of the oscillations can be very precisely controlled. It has linear control over frequency, amplitude and pulse-width. It can be used in frequency, amplitude and pulse-width modulation applications as well as in the accurate piecewise linear waveform synthesis. Experimental results of a MOSIS CMOS AMI 0.5 lm technology test chip are presented that validate the proposed circuit.

show abstract

New Compact CMOS Continuous-Time Low-Voltage Analog Rank-Order Filter Architecture

Cited by 12 publications

References 8 publications

High-Performance Mixed-Mode Universal Min-Max Circuits for Nanotechnology

High-Performance Mixed-Mode Universal Min-Max Circuits for Nanotechnology

A nine-input 1.25 mW, 34 ns CMOS analog median filter for image processing in real time

Versatile multi-decade CMOS voltage-controlled oscillator with accurate amplitude and pulse width control

Contact Info

Product

Resources

About