New Electrochemically Protective Layer Based on Nanometric Dielectric Coating for Silicon Based Micro Supercapacitors

Abstract

Dielectric materials have been used for decades for micro and nanoelectronics where their insulation and polarizability properties are critical. However, in the energy storage field, material scientists tends to consider high-k dielectric layers in contact with an active material only as an insulating passivation layer. In microelectronics, this conception has been modified with the study of dielectrics at nanoscale level [1-2] revealing interesting properties scarcely known by other fields [3]. We propose to reconsider the vision of high-k dielectric materials for energy at nanoscale specifically.Based on microelectronic techniques [4], a nanometric-scale thick layer of dielectric is deposited by Atomic Layer Deposition (ALD). Allowing us to create an ultra-thin, pinhole-free alumina (Al2O3) nanometric layers on complex architectures as the entanglement of Silicon nanowires.[5] Microelectronics measurements on a single silicon nanowire (SiNW) is shown to display thickness dependent tunneling electrical conduction. This result brings a new light on this material class in the energy field and allows original approaches : achieving scientific leaps by using thin layers of dielectric to protect the active materials and enhance their lifetime in new environments. As an illustrative application, a silicon based micro-supercapacitor (µSC) protected by a 3 nm alumina layer exhibits Electrical Double Layer Capacitance (EDLC) by means of tunneling current in aqueous electrolyte. This result is an unprecedented for this material, allowing an outstanding lifetime capacity and retaining 99% of its initial capacitance after 2 million cycles. Extended to multiple energy materials, such method could lead to notable progresses [6]. References [1] G.D. Wilk, R.M. Wallace, J.M. Anthony, High-κ gate dielectrics: Current status and materials properties considerations, J. Appl. Phys. 89 (2001), 5243, doi: 10.1063/1.1361065[2] H. Zhang, X. Guo, J. Hui, S. Hu, W. Xu, D. Zhu, Interface Engineering of Semiconductor/Dielectric Heterojunctions toward Functional Organic Thin-Film Transistors, Nano Lett. 11 (2011), 4939-4946, doi: 10.1021/nl2028798.[3] A. S. Asundi, J. A. Raiford, S. F. Bent, Opportunities for Atomic Layer Deposition in Emerging Energy Technologies, ACS Energy Letters. Mater. 4 (2019), 908-925, doi: 10.1021/acsenergylett.9b00249.[4] S.M. George, Atomic Layer Deposition: An Overview, Chem. Rev. 110 (2010), 111-131, doi: 10.1021/cr900056b.[5] D. Gaboriau, M. Boniface, A. Valero, D. Aldakov, T. Brousse, P. Gentile, S. Sadki, Atomic Layer Deposition Alumina-Passivated Silicon Nanowires: Probing the Transition from Electrochemical Double-Layer Capacitor to Electrolytic Capacitor, ACS Appl. Mater. Interfaces 9 (2017), 13761-13769, doi: 10.1021/acsami.7b01574.[6] A. Valero, A. Mery, D. Gaboriau, P. Gentile, S. Sadki, One Step Deposition of PEDOT–PSS on ALD Protected Silicon Nanowires: Toward Ultrarobust Aqueous Microsupercapacitors. ACS Appl. Energy Mater. 2 (2019), 1, 436–447, doi.org/10.1021/acsaem.8b01470.