New Memristor-Based Crossbar Array Architecture with 50-% Area Reduction and 48-% Power Saving for Matrix-Vector Multiplication of Analog Neuromorphic Computing

Abstract

Abstract-In this paper, we propose a new memristorbased crossbar array architecture, where a single memristor array and constant-term circuit are used to represent both plus-polarity and minus-polarity matrices. This is different from the previous crossbar array architecture which has two memristor arrays to represent plus-polarity and minus-polarity connection matrices, respectively. The proposed crossbar architecture is tested and verified to have the same performance with the previous crossbar architecture for applications of character recognition. For areal density, however, the proposed crossbar architecture is twice better than the previous architecture, because only single memristor array is used instead of two crossbar arrays. Moreover, the power consumption of the proposed architecture can be smaller by 48% than the previous one because the number of memristors in the proposed crossbar architecture is reduced to half compared to the previous crossbar architecture. From the high areal density and high energy efficiency, we can know that this newly proposed crossbar array architecture is very suitable to various applications of analog neuromorphic computing that demand high areal density and low energy consumption.

Learning in Memristive Neural Network Architectures Using Analog Backpropagation Circuits

“…Comparing to the existing implementations of negative voltages in the crossbar array [56], [57], [58], the method for sign control reduces the complexity of the implementation and ensures the stability of the output. For example, the crossbar in [57] can perform dot product multiplication for both positive and negative signals. However, the system is complex because of the amplifiers that perform subtraction of the voltages.…”

Neuromorphic computing with resistive switching memory devices

“…For instance, up to 8 levels, i.e., 3 bits, have been demonstrated with RRAM devices [50,51] and PCM devices [52], thus supporting the feasibility of a very high synaptic density in the ANN. The second added value of using 2-terminal resistive memories is the crosspoint-architecture which enables physical computation of MVM by Ohm's and Kirchhoff's laws [26,27]. In fact, the total current Ij of the crosspoint column of index j is given by:…”

“…Finally, RRAM and PCM allow for integration in crosspoint arrays, which naturally provide matrix-vector multiplication (MVM) via physical computing through the Ohm's law and the Kirchhoff's law [26,27].…”

Memristive and CMOS Devices for Neuromorphic Computing

“…Besides the difficult scaling, another crucial issue of today's digital computers is the physical distinction between the central processing unit (CPU) and the memory unit at the origin of extensive data movement during computation, especially for data-intensive tasks [9]. Solving the memory bottleneck requires a paradigm shift in architecture, where computation is executed in situ within the data by exploiting, e.g., the ability of memory arrays to implement matrix-vector multiplication (MVM) [10,11]. This novel architectural approach is referred to as in-memory computing, which provides the basis for several outstanding applications, such as pattern classification [12,13], analogue image processing [14], and the solution of linear systems [15,16] and of linear regression problems [17].…”