Abstract:A new method of fabricating Sn bumps by electroplating without a PR (photoresist) mould on a Si die was investigated in terms of the bump growth and morphology for application to 3D-chip stacking. The omission of the PR mould was expected to result in a reduction of the process time and of the cost of electroplate bumping on the Si chip. For the electroplating of Sn bumps, a cathode consisting of a Si die with a Cuplugged TSV (through-silicon via) was used, with Sn or Pt adopted as an anode. The current densit… Show more
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