New robust QCA D flip flop and memory structures

Design of QCA D Flip-Flop with High Space Efficiency Based on Planar Structure

“…Various logic circuits can be constructed by using AND gates and OR gates which are the basic logic gates in QCA. Additionally, when the clock is 0, the output value does not change regardless of the input D value, and when the clock is 1, the value of the input D is outputted directly [12]. Figure 5 shows the previousD flip-flops [12][ [13] …”

Content addressable memory cell in quantum-dot cellular automata

“…RAM cell structure with set and reset ability has been presented in [30]. This structure is composed of two 2:1 multiplexers.…”

“…Many works such as [11,15,[26][27][28][29][30][31] focus on this problem. But these works have been done on RAM model, where the each memory location is accessed by a specific address.…”

Design of Low Hardware Complexity Multiplexer Using NAND Gates on Quantum-Dot Cellular Automata

“…Figure 7, Figure 8 and Figure 9 show a different way to construct 2-to-1 multiplexer and simulation result [21][22][23]. Mardiris"s multiplexer [21] use two majority AND gates, one majority OR gate and two simple inverter.…”

“…They all use a coplanar wire crossing scheme. Hashemi"s multiplexer [23] do not use any wire crossing scheme. The design use two majority AND gates, one majority OR gate and a robust inverter.…”